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TPS65165 Compact LCD Bias IC With High Speed Amplifiers for TV and Monitor TFT-LCD Panels TI
Texas Instruments TI
TPS65165 Datasheet PDF : 26 Pages
First Prev 21 22 23 24 25 26
TPS65165
SLVS723 – DECEMBER 2006
www.ti.com
PCB Layout Design Guidelines:
1. Place the power components outlined in bold first on the PCB.
2. Rout the traces outlined in bold with wide PCB traces
3. Place a 1-µF bypass capacitor directly from the Vin pin to GND since this is the supply pin for internal
circuits.
4. Place a 1-µF bypass capacitor directly from the SUP pin to GND since this is the supply pin for internal
circuits.
5. Use a short and wide trace to connect the SUP pin to the output of the boost converter Vs.
6. Place the 220-nF reference capacitor directly from REF to AGND close to the IC pins.
7. The feedback resistor for the negative charge pump between FBN and REF needs to be >40k.
8. Use short traces for the charge pump drive pin (DRVN) of VGL because the traces carry switching
waveforms.
9. Place the flying capacitors as close as possible to the C1P, C1N and C2P, C2N pin.
10. Solder the Power Pad of the QFN package to GND and use thermal vias to lower the thermal resistance
Vin
5.0 V
L1
10 mH
D1
C1
22 mF
C10
2.2 nF
C2 C3
22 mF 22 mF
C4
1 mF
R3
10 kW 33 COMP
C11 2
C2P
24 25
330nF 1
C2N
17
HVS
16 CTRL
36
DRN
R10
1kW
5
POS1
6
NEG1
7
OUT1
10 POS2
9 NEG2
8 OUT2
C5 C6 C7
22 mF 22 mF 22 mF
29 30
TPS65165
14 15 20 11
C17 C18 C19
22 nF 22 nF 22 nF
3 12 23
C8
R1
1 mF 470 kW
Vs
15V/1.0A
C9
100 pF
R2
4
39 kW
FB 34
RHVS 32
R4
220 kW
37
FBP
POUT 38
39
C1P
40
C1N
C12 C13
1 mF
330nF
C14
100 pF
27
PGND
28
PGND
VGH 35
18
DRVN
21
FBN
22
REF
C20
220 nF
C15
330 nF
D3
D2
R7
160 kW
R8
39 kW
R5
300
kW
R6
16 kW
VGH
27.5V/50mA
VGL
-5V/50mA
C16
330 nF
Figure 22. Layout Recommendation
22
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