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TS68882DESC04XA View Datasheet(PDF) - Atmel Corporation

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TS68882DESC04XA
Atmel
Atmel Corporation Atmel
TS68882DESC04XA Datasheet PDF : 43 Pages
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Introduction
The TS68882 is a high-performance floating-point device designed to interface with the
TS68020 or TS68030 as a co-processor. This device fully supports the TS68000 virtual
machine architecture, and is implemented in HCMOS, Atmels low power, small geome-
try process. This process allows CMOS and HMOS (high-density NMOS) gates to be
combined on the same device. CMOS structures are used where speed and low power
is required, and HMOS structures are used where minimum silicon area is desired. The
HCMOS technology enables the TS68882 to be very fast while consuming less power
than comparable HMOS, and still have a reasonably small die size.
With some performance degradation, the TS68882 can also be used as a peripheral
processor in systems where the TS68020 or TS68030 is not the main processor (i.e.,
TS68000, TS68010). The configuration of the TS68882 as a peripheral processor or co-
processor may be completely transparent to user software (i.e., the same object code
may be executed in either configuration).
The architecture of the TS68882 appears to the user as a logical extension of the
TS68000 Family architecture. Coupling of the co-processor interface allows the
TS68020/TS68030 programmer to view the TS68882 registers as though the registers
are resident in the TS68020/TS68030. Thus, a TS68020 or TS68030/TS68882 device
pair appears to be one processor that supports seven floating-point and integer data
types, and has eight integer data registers, eight address registers, and eight floating-
point data registers.
As shown in Figure 1, the TS68882 is internally divided into four processing elements;
the Bus Interface Unit (BIU), the Conversion Control Unit (CCU), the Execution Control
Unit (ECU), and the Microcode Control Unit (MCU). The BIU communicates with the
main processor, the CCU controls the main processor communications dialog and per-
forms some data conversions, and the ECU and MCU execute most floating-point
calculations.
The BIU contains the co-processor interface registers, and the 32-bit control, and
instruction address registers. In addition to these registers, the register select and
DSACK timing control logic is contained in the BIU. Finally, the status flags used to mon-
itor the status of communications with the main processor are contained in the BIU.
The CCU contains special-purpose hardware that performs conversions between the
single, double, and extended precision memory data formula and the internal data for-
mat used by the ECU. It also contains a state machine that controls communications
with the main processor during co-processor interface dialogs.
The eight 80-bit floating-point data registers (FP0-FP7) are located in the ECU. In addi-
tion to these registers, the ECU contains a high-speed 67-bit arithmetic unit used for
both mantissa and exponent calculations, a barrel shifter that can shift from 1-bit to 67-
bits in one machine cycle, and ROM constants (for use by the internal algorithms or user
programs).
The MCU contains the clock generator, a two-level microcoded sequencer that controls
the ECU, the microcode ROM, and self-test circuitry. The built-in self-test capabilities of
the TS68882 enhance reliability and ease manufacturing requirements; however, these
diagnostic functions are not available to the user.
2 TS68882
2119AHIREL04/02
 

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