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Y3574 View Datasheet(PDF) - Texas Instruments

Part NameDescriptionManufacturer
Y3574 5-V ANALOG, 3-/5-V DIGITAL, 14-/12-BIT, 200-KSPS, 4-/8-CHANNEL SERIAL ANALOG-TO-DIGITAL CONVERTERS WIRH ±10-V INPUTS TI
Texas Instruments TI
Y3574 Datasheet PDF : 51 Pages
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TLC3574, TLC3578, TLC2574, TLC2578
5ĆV ANALOG, 3Ć/5ĆV DIGITAL, 14Ć/12ĆBIT, 200ĆKSPS, 4Ć/8ĆCHANNEL
SERIAL ANALOGĆTOĆDIGITAL CONVERTERS WITH ±10ĆV INPUTS
SLAS262C − OCTOBER 2000 − REVISED MAY 2003
conversion operation (continued)
Configure Conversion
From CH0
CS
Conversion
From CH2
Conversion
From CH0
Conversion
From CH2
FS
CSTART
SDÌI Ì***Ì** ÌÌÌÌÌÌÌÌÌÌ* ÌÌ* ÌÌ* ÌÌ* Ì** ÌÌÌÌÌÌÌÌ*ÌÌ
INT
SDO
1st SWEEP
ÌÌÌDon’t Care
Ì*** Command = Configure Write for Mode 11, FIFO
Threshold = 1/2 Full, Sweep Sequence: 0−0−2−2
** COMMAND = Select Any Channel
* COMMAND = Read FIFO
CH0
CH0
CH2
1st FIFO Read
ÌCH2
READ FIFO after 1st SWEEP Completed
REPEAT
CH0
2nd FIFO Read
Possible Signal
Figure 19. Mode 11, CSTART Triggers Samplings/Conversions, FS Initiates SELECT Operation
conversion clock and conversion speed
The conversion clock source can be the internal OSC, or the external clock, SCLK. The conversion clock is equal
to the internal OSC if the internal clock is used, or equal to SCLK/4 when the external clock is selected. It takes
18 conversion clocks plus 15 ns to finish the conversion for TLC3574 and TLC3578, and 13 conversion clocks
plus 15 ns for the TLC2574 and TLC2578. If the external clock is selected, the conversion time (not including
sampling time) is 18X(4/fSCLK)+15 ns for TLC3574 and TLC3578 and 13X(4/fSCLK)+15 ns for TLC2574 and
TLC2578. Table 4 shows the maximum conversion rate (including sampling time) when the analog input source
resistor is 25 .
DEVICE
TLC3574/78
(Rs = 25 )
TLC2574/78
(Rs = 25 )
Table 4. Maximum Conversion Rate
SAMPLING MODE
SHORT (16 SCLK)
LONG (48 SCLK)
SHORT (16 SCLK)
LONG (48 SCLK)
SHORT (16 SCLK)
LONG (48 SCLK)
SHORT (16 SCLK)
LONG (48 SCLK)
CONVERSION CLK
External SCLK/4
External SCLK/4
Internal 6.5 MHz
Internal 6.5 MHz
Exernal SCLK/4
External SCLK/4
Internal 6.5 MHz
Internal 6.5 MHz
MAX SCLK
(MHz)
10
25
10
25
10
25
10
25
CONVERSION
TIME (µs)
8.815
4.815
4.384
4.705
6.815
4.015
3.615
3.935
RATE
(KSPS)
113.4
207.7
228.0
212.5
146.7
249.1
276.6
254.1
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