87C51 80C51BH 80C31BH
SERIAL PORT TIMING SHIFT REGISTER MODE
Symbol
Parameter
12 MHz
Oscillator
24 MHz
Oscillator
Min Max Min Max
TXLXL Serial Port Clock
10
Cycle Time
0 500
TQVXH Output Data Setup 700
284
to Clock Rising Edge
TXHQX Output Data Hold
After Clock
Rising Edge
87C51 BH
50
87C51-24 BH-24
34
TXHDX Input Data Hold
0
0
After Clock
Rising Edge
TXHDV Clock Rising Edge
to Input Data Valid
700
283
Variable Oscillator
Min
Max
12TCLCL
10TCLCLb133
2TCLCLb117
2TCLCLb34
0
Units
ms
ns
ns
ns
10TCLCLb133 ns
SHIFT REGISTER MODE TIMING WAVEFORMS
AC TESTING INPUT OUTPUT WAVEFORMS
FLOAT WAVEFORMS
272335 – 18
272335 – 19
AC inputs during testing are driven at VCC b 0 5 for a Logic ‘‘1’’
and 0 45V for a Logic ‘‘0 ’’ Timing measurements are made at VIH
min for a Logic ‘‘1’’ and VIL max for a Logic ‘‘0’’
272335 – 20
For timing purposes a port pin is no longer floating when a
100 mV change from load voltage occurs and begins to float
when a 100 mV change from the loaded VOH VOL level occurs
IOL IOH e g20 mA
16