NXP Semiconductors
19. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .3
Pin configuration DIP8 . . . . . . . . . . . . . . . . . . . . . .4
Pin configuration SO14 . . . . . . . . . . . . . . . . . . . . .4
Signals for valley switching . . . . . . . . . . . . . . . . . .6
Typical phase of drain ringing at switch-on
(at N × Vo = 80 V). . . . . . . . . . . . . . . . . . . . . . . . . .7
Primary sensed application; configuration
for TEA152xP (DIP8) . . . . . . . . . . . . . . . . . . . . . .12
Package outline SOT97-1 (DIP8) . . . . . . . . . . . .13
Package outline SOT108-1 (SO14) . . . . . . . . . . .14
TEA152x
SMPS ICs for low-power systems
TEA152X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 14 September 2010
continued >>
© NXP B.V. 2010. All rights reserved.
19 of 20