TEA1522P View Datasheet(PDF) - NXP Semiconductors.
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TEA1522P Datasheet PDF : 20 Pages
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NXP Semiconductors
TEA152x
SMPS ICs for low-power systems
Table 6. Characteristics …continued
Tamb = 25 °C; no overtemperature; all voltages are measured with respect to ground; currents are
positive when flowing into the IC; unless otherwise specified.
Symbol
Parameter
Conditions
Min Typ Max Unit
Valley switching
(ΔV/Δt)vrec
valley recognition voltage
change with time
−102 -
+102 V/μs
fvalley
ringing frequency for valley N × Vo = 100 V
switching
200 550 800 kHz
td(vrec-swon)
valley recognition to
switch-on delay time
-
150 -
ns
Current and short-circuit winding protection
Vsource(max)
maximum voltage on pin
SOURCE
ΔV/Δt = 0.1 V/μs
0.47 0.50 0.53 V
td(prop)
Vswp
delay from detecting
Vsource(max) to switch-off
short-winding protection
voltage
ΔV/Δt = 0.5 V/μs
ΔV/Δt = 0.5 V/μs
-
160 185 ns
0.7 0.75 0.8 V
tleb
leading edge blanking time
FET output stage
250 350 450 ns
IL(drain)
leakage current on pin
DRAIN
Vdrain = 650 V
-
-
125 μA
VBR(DRAIN)
breakdown voltage on pin
DRAIN
Tj > 0 °C
650 -
-
V
RDSon
drain-source on-state
resistance
TEA1520x
TEA1521x
TEA1522x
TEA1523P
tf(DRAIN)
fall time on pin DRAIN
Isource = −0.06 A
Tj = 25 °C
-
Tj = 100 °C
-
Isource = −0.125 A
Tj = 25 °C
-
Tj = 100 °C
-
Isource = −0.25 A
Tj = 25 °C
-
Tj = 100 °C
-
Isource = −0.50 A
Tj = 25 °C
-
Tj = 100 °C
-
Vi = 300 V;
-
no external capacitor
at drain
48 55.2 Ω
68 78.2 Ω
24 27.6 Ω
34 39.1 Ω
12 13.8 Ω
17 19.6 Ω
6.5 7.5 Ω
9.0 10.0 Ω
75 -
ns
Temperature protection
Tprot(max)
maximum threshold
temperature
150 160 170 °C
Tprot(hys)
hysteresis of protection
temperature
-
2
-
°C
TEA152X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 04 — 14 September 2010
© NXP B.V. 2010. All rights reserved.
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