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TEA1733MT View Datasheet(PDF) - NXP Semiconductors.

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Description
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TEA1733MT
NXP
NXP Semiconductors. NXP
TEA1733MT Datasheet PDF : 20 Pages
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NXP Semiconductors
TEA1733MT
GreenChip SMPS control IC
7. Functional description
7.1 General control
The TEA1733MT contains a flyback circuit controller, a typical configuration of which is
shown in Figure 3.
C1
R1
C2
R2
R3
R4
Θ
Z1
TEA1733MT
VINSENSE 5
PROTECT 6
4 ISENSE
R5
3 DRIVER
CTRL 7
OPTIMER
8
C3
2 GND
1 VCC
C4
R8
C5
S1
R10
R6
C6
R9
Fig 3. Typical configuration
R7
001aan248
7.2 Start-up and UnderVoltage LockOut (UVLO)
Initially, the capacitor on the VCC pin is charged from the high voltage mains via resistor
R3.
If VCC is lower than Vstartup, the IC current consumption is low (typically 10 μA). When VCC
reaches Vstartup the IC first waits for pin VINSENSE to reach the Vstart(VINSENSE) voltage
and for pin PROTECT to reach the Vdet(L)(PROTECT) voltage. When both levels are
reached, the IC charges the ISENSE pin to the Vstart(soft) level and starts switching. In a
typical application the supply voltage is taken over by the auxiliary winding of the
transformer.
If a protection is triggered the controller stops switching. Depending on the protection
triggered, the protection causes a restart or latches the converter to an off-state.
A restart caused by a protection rapidly charges the OPTIMER pin to 4.5 V (typical). The
TEA1733MT enters the Power-down mode until the OPTIMER pin discharges down to
1.2 V (typical). In Power-down mode, the IC consumes a very low supply current
(10 μA typical) and the VCC pin is clamped at 22 V (typical) by an internal clamp circuit.
When the voltage on pin OPTIMER drops below 1.2 V (typical) and the VCC pin voltage is
above the VCC start-up voltage (See Figure 4), the IC restarts.
When a latched protection is triggered, the TEA1733MT immediately enters Power-down
mode. The VCC pin is clamped to a voltage just above the latch protection reset voltage
(Vrst(latch) + 1 V).
TEA1733MT
Preliminary data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 1 — 4 February 2011
© NXP B.V. 2011. All rights reserved.
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