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TDA8359 View Datasheet(PDF) - Philips Electronics

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Description
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TDA8359 Datasheet PDF : 20 Pages
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Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS
Product specification
TDA8359J
CHARACTERISTICS
VP = 12 V; VFB = 45 V; fvert = 50 Hz; VI(bias) = 880 mV; Tamb = 25 °C; measured in test circuit of Fig.3; unless otherwise
specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX. UNIT
Supplies
VP
VFB
Iq(P)(av)
Iq(P)
Iq(FB)(av)
operating supply voltage
flyback supply voltage
average quiescent supply current
quiescent supply current
average quiescent flyback supply
current
note 1
during scan
no signal; no load
during scan
7.5
12
18
V
2 × VP 45
66
V
10
15
mA
45
75
mA
10
mA
Inputs A and B
Vi(p-p)
input voltage (peak-to-peak value) note 2
VI(bias)
input bias voltage
note 2
100
II(bias)
input bias current
source
Outputs A and B
Vloss(1)
voltage loss first scan part
note 3
Io = 1.1 A
Io = 1.6 A
Vloss(2)
voltage loss second scan part
note 4
Io = 1.1 A
Io = 1.6 A
Io(p-p)
output current
(peak-to-peak value)
LE
linearity error
Voffset
offset voltage
Voffset(T) offset voltage variation with
temperature
Io(p-p) = 3.2 A; notes 5 and 6
adjacent blocks
non adjacent blocks
across RM; Vi(dif) = 0 V
VI(bias) = 200 mV
VI(bias) = 1 V
across RM; Vi(dif) = 0 V
VO
DC output voltage
Vi(dif) = 0 V
Gv(ol)
open-loop voltage gain
notes 7 and 8
f3dB(h)
high 3 dB cut-off frequency
open-loop
Gv
voltage gain
note 9
Gv(T)
voltage gain variation with the
temperature
PSRR
power supply rejection ratio
note 10
80
1000 1500 mV
880
1600 mV
25
35
µA
4.5
V
6.6
V
3.3
V
4.8
V
3.2
A
1
2
%
1
3
%
±15
±20
40
0.5 × VP
60
1
1
104
90
mV
mV
µV/K
V
dB
kHz
K1
dB
2002 Jan 21
6
 

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