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TDA8358J/N1 View Datasheet(PDF) - Philips Electronics

Part Name
Description
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TDA8358J/N1 Datasheet PDF : 20 Pages
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Philips Semiconductors
Full bridge vertical deflection output circuit
in LVDMOS with east-west amplifier
Product specification
TDA8358J
LIMITING VALUES
In accordance with the Absolute Maximum Rating System (IEC 134).
SYMBOL
PARAMETER
VP
VFB
VVGND-EWGND
supply voltage
flyback supply voltage
voltage difference between
pins VGND and EWGND
Vn
DC voltage
pins OUTA and OUTEW
pin OUTB
pins INA, INB, INEW, GUARD,
FEEDB, and COMP
In
DC current
pins OUTA and OUTB
pins OUTA and OUTB
pins INA, INB, INEW, GUARD,
FEEDB, and COMP
pin OUTEW
Ilu
latch-up current
Ves
PEW
Ptot
Tstg
Tamb
Tj
electrostatic handling voltage
east-west power dissipation
total power dissipation
storage temperature
ambient temperature
junction temperature
CONDITIONS
MIN.
MAX. UNIT
18
V
68
V
0.3 V
note 1
68
V
VP
V
0.5 VP
V
during scan (p-p)
at flyback (peak); t 1.5 ms
3.2 A
±1.8 A
20 +20 mA
750 mA
input current into any pin;
pin voltage is 1.5 × VP; Tj = 150 °C
+200 mA
input current out of any pin;
200
mA
pin voltage is 1.5 × VP; Tj = 150 °C
machine model; note 2
300 +300 V
human body model; note 3
2000 +2000 V
note 4
4
W
15
W
55 +150 °C
25 +75 °C
note 5
150 °C
Notes
1. When the voltage at pin OUTA supersedes 70 V the circuit will limit the voltage.
2. Equivalent to 200 pF capacitance discharge through a 0 resistor.
3. Equivalent to 100 pF capacitance discharge through a 1.5 kresistor.
4. For repetitive time durations of t < 0.1 ms or a non repetitive time duration of t < 5 ms the maximum (peak) east-west
power dissipation PEW(peak) = 15 W.
5. Internally limited by thermal protection at Tj 170 °C.
THERMAL CHARACTERISTICS
In accordance with IEC 747-1.
SYMBOL
Rth(j-c)
Rth(j-a)
PARAMETER
thermal resistance from junction to case
thermal resistance from junction to ambient
CONDITIONS
in free air
VALUE
4
40
UNIT
K/W
K/W
1999 Dec 22
6
 

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