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E-TDA7590 View Datasheet(PDF) - STMicroelectronics

Part Name
Description
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E-TDA7590 Datasheet PDF : 40 Pages
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Pin description
TDA7590
2.2
Table 1.
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Pin function
Pin function
Name
Type
Description
SRD1/TI02
STD1
I/O Serial Receive Data. Serial input data for receiver. Timer 2 input/output.
I/O Serial Transmit Data. Serial output data from transmitter.
SC02
SC01
I/O
Serial Control 2.Transmitter frame sync only in asynchronous mode,
transmitter and receiver frame sync in synchronous mode.
Serial Control 1. Receive frame sync in asynchronous mode, output
I/O
from transmitter 2 or serial flag 1 in synchronous mode.
DE_N
NMI_N
SRD0
IOVDD
IOVSS
I/O
Test Data Output(Input/Output). Debug Request input and Acknowledge
output.
Non-maskable interrupt/ PINIT. Used to enable the PLL during RESET
I
and as a non-maskable interrupt at all other times.
I/O Serial Receive Data. Serial input data for receiver.
I IO Power Supply.
I IO Ground.
STD0
SC10/SCL
I/O Serial Transmit Data. Serial output data from transmitter.
ESSI1 Serial Control 0. Receive clock in asynchronous mode, output from
I/O transmitter or serial flag in synchronous mode.
I2C SCL. Serial Clock Line.
SC00
RXD
I/O
Serial Control 0. Receive clock in asynchronous mode, output from
transmitter 1 or serial flag 0 in synchronous mode.
I/O SCI Receive Data. Receives byte-oriented serial data.
TXD
SCLK
SCK1/TI01
SCK0
RESETN
SCANEN
TESTEN
COREVSS
COREVDD
I/O SCI Read Enable. Transmits serial data from SCI transmit shift register.
SCI Serial Clock. Input or ouput clock from which data is transferred in
I/O synchronous mode and from which the transmit and/or receive baud rate is
derived in asynchronous mode.
Serial Clock. Serial bit clock for transmitter only in asynchronous mode, serial
I/O bit clock for both receiver and transmitter in synchronous mode.
Timer 1 input/output.
I/O
Serial Clock. Serial bit clock for transmitter only in asynchronous mode, serial
bit clock for both receiver and transmitter in synchronous mode.
I System Reset. A low level applied to RESET_N input initializes the IC.
I
SCAN Enable. When active with TESTEN also active, controls the shifting of
the internal scan chains.
Test Enable. When active, puts the chip into test mode and muxes the XTI
I clock to all flip-flops. When SCANEN is also active, the scan chain shifting is
enabled.
I Core Ground.
I Core Power Supply.
TIO0
I/O Timer 0 input/output.
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