ASK Single Conversion Receiver
Input Level at LNA Input [dBm]
Figure 6 Typical Curve of RSSI Level and Permissive AGC Threshold Levels
The switching point should be chosen according to the intended operating scenario. The determination of the
optimum point is described in the accompanying Application Note, a threshold voltage level of 1.8 V is apparently
a viable choice. It should be noted that the output of the 3VOUT pin is capable of driving up to 50 µA, but that the
THRES pin input current is only in the region of 40 nA. As the current drawn out of the 3VOUT pin is directly related
to the receiver power consumption, the power divider resistors should have high impedance values. R4 can be
chosen as 120 kΩ, R5 as 180 kΩ to yield an overall 3VOUT output current of 10 µA.
1. To keep the LNA in high gain mode for the complete RF-input level range a voltage equal or higher than 3.3 V
has to be applied at pin 23. Alternatively, pin 23 has to be connected to pin 24 and pin 4 has to be connected
to GND. In addition this would save an external capacitor.
2. To keep the LNA in low gain mode for the complete RF-input level range a voltage lower than 0.7 V has to be
applied to the THRES pin (e.g. THRES connected to GND). In the above-mentioned mode pin 4 has to be
connected by a capacitor to GND.
3. As stated above, the gain control voltage of the LNA is generated at the capacitor connected to the TAGC pin
by the charging and discharging currents of the OTA. Consequently this capacitor is responsible for the AGC
time constant. As the charging and discharging currents are not equal two different time constants will result.
The time constant corresponding to the charging process of the capacitor shall be chosen according to the
data rate. According to measurements performed at Infineon the capacitor value should be greater than 47 nF.
Revision 1.6, 2010-12-21