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SY100S325 View Datasheet(PDF) -

Part Name
Description
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SY100S325
 
SY100S325 Datasheet PDF : 0 Pages
Micrel, Inc.
LOW-POWER HEX
ECL-to-TTL
TRANSLATOR
SY100S325
SY100S325
FEATURES
DESCRIPTION
s Max. propagation delay of 3.7ns
s IEE min. of –37mA
s TTL outputs
s Extended supply voltage option:
VEE = –4.2V to –5.5V
s 25% faster than National's 325
s Differential inputs with built-in offset
s Voltage and temperature compensation for improved
noise immunity
s VBB output for single-ended use
s Internal 75Kinput pull-down resistors
s Function and pinout compatible with Fairchild F100K
s Available in 28-pin PLCC package
The SY100S325 are hex translators for converting
100K ECL logic levels to TTL logic levels. Inputs can be
used as inverting, non-inverting or differential receivers.
An internal reference voltage generator provides VBB for
single-ended operation or for use in Schmitt trigger
applications. All inputs have 75Kpull-down resistors.
The outputs will go LOW when the inputs are either open
or have the same potential.
When used in single-ended operation, the apparent
input threshold of the true inputs is 20mV to 40mV higher
(positive) than the threshold of the complementary inputs.
The VTTL and VEE power may be applied in either order.
BLOCK DIAGRAM
VBB
D0
Q0
D0
D1
Q1
D1
D2
Q2
D2
D3
Q3
D3
D4
Q4
D4
D5
Q5
D5
PIN NAMES
Pin
D0–D5
D0–D5
Q0–Q5
VEES
VTTL
VCCA
Function
Data Inputs
Inverting Data Inputs
Data Outputs
VEE Substrate
TTL VCC Power Supply
VCCO for ECL Outputs
M9999-051607
hbwhelp@micrel.com or (408) 955-1690
1
Rev.: I
Amendment: /0
Issue Date: May 2007
 

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