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F272-BAR-P View Datasheet(PDF) - STMicroelectronics

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ST10F272B/ST10F272E
Internal Flash memory
5.2.2
Modules structure
The IFLASH module is composed by a bank (Bank 0) of 256 Kbyte of Program Memory
divided in 8 sectors (B0F0...B0F7). Bank 0 contains also a reserved sector named Test-
Flash. The Addresses from 0x08 0000 to 0x08 FFFF are reserved for the Control Register
Interface and other internal service memory space used by the Flash Program/Erase
controller.
The following tables show the memory mapping of the Flash when it is accessed in read
mode (Table 4: Flash modules sectorization (Read operations)), and when accessed in
write or erase mode (Table 5: Flash modules sectorization (Write operations or with
ROMS1=’1’ or BootStrap mode)): note that with this second mapping, the first four banks
are remapped into code segment 1 (same as obtained setting bit ROMS1 in SYSCON
register).
Table 4.
Bank
B0
Flash modules sectorization (Read operations)
Description
Addresses
Size ST10 Bus size
Bank 0 Flash 0 (B0F0)
0x0000 0000 - 0x0000 1FFF 8 KB
Bank 0 Flash 1 (B0F1)
0x0000 2000 - 0x0000 3FFF 8 KB
Bank 0 Flash 2 (B0F2)
0x0000 4000 - 0x0000 5FFF 8 KB
Bank 0 Flash 3 (B0F3)
Bank 0 Flash 4 (B0F4)
0x0000 6000 - 0x0000 7FFF 8 KB
32-bit (I-BUS)
0x0001 8000 - 0x0001 FFFF 32 KB
Bank 0 Flash 5 (B0F5)
0x0002 0000 - 0x0002 FFFF 64 KB
Bank 0 Flash 6 (B0F6)
0x0003 0000 - 0x0003 FFFF 64 KB
Bank 0 Flash 7 (B0F7)
0x0004 0000 - 0x0004 FFFF 64 KB
Table 5.
Bank
B0
Flash modules sectorization
(Write operations or with ROMS1=’1’ or BootStrap mode)
Description
Addresses
Size
ST10 Bus size
Bank 0 Test-Flash (B0TF)
Bank 0 Flash 0 (B0F0)
Bank 0 Flash 1 (B0F1)
Bank 0 Flash 2 (B0F2)
Bank 0 Flash 3 (B0F3)
Bank 0 Flash 4 (B0F4)
Bank 0 Flash 5 (B0F5)
Bank 0 Flash 6 (B0F6)
Bank 0 Flash 7 (B0F7)
0x0000 0000 - 0x0000 1FFF 8 KB
0x0001 0000 - 0x0001 1FFF 8 KB
0x0001 2000 - 0x0001 3FFF 8 KB
0x0001 4000 - 0x0001 5FFF 8 KB
0x0001 6000 - 0x0001 7FFF 8 KB
0x0001 8000 - 0x0001 FFFF 32 KB
0x0002 0000 - 0x0002 FFFF 64 KB
0x0003 0000 - 0x0003 FFFF 64 KB
0x0004 0000 - 0x0004 FFFF 64 KB
32-bit (I-BUS)
Table 5 above refers to the configuration when bit ROMS1 of SYSCON register is set.
Doc ID 11917 Rev 3
29/188
 

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