SST39SF020A-70-4C-U1 View Datasheet(PDF) - Silicon Storage Technology

Part Name

Description

View to exact match

SST39SF020A-70-4C-U1

1 Mbit / 2 Mbit / 4 Mbit (x8) Multi-Purpose Flash

Silicon Storage Technology 

1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash

SST39SF010A / SST39SF020A / SST39SF040

Preliminary Specification

ADDRESS AMS-0

CE#

SIX-BYTE CODE FOR CHIP-ERASE

5555 2AAA

5555

5555

2AAA

5555

TSCE

OE#

WE#

TWP

DQ7-0

AA

55

80

AA

55

10

SW0

SW1

SW2

SW3

SW4

SW5

Note: This device also supports CE# controlled Chip-Erase operation. The WE# and CE# signals are

interchageable as long as minimum timings are met. (See Table 10)

SAX = Sector Address

AMS = Most significant address

AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040

FIGURE 10: WE# CONTROLLED CHIP-ERASE TIMING DIAGRAM

398 ILL F17.1

ADDRESS A14-0

Three-byte sequence for

Software ID Entry

5555

2AAA

5555

0000

0001

CE#

OE#

WE#

DQ7-0

TWP

TIDA

TWPH

AA

55

90

TAA

BF

Device ID

SW0

SW1

SW2

Device ID = B5H for SST39SF010A, B6H for SST39SF020A, and B7H for SST39SF040

FIGURE 11: SOFTWARE ID ENTRY AND READ

©2001 Silicon Storage Technology, Inc.

13

398 ILL F09.2

S71147-02-000 5/01 398

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