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SST39SF010A-70-4I-U1 View Datasheet(PDF) - Silicon Storage Technology

Part Name
Description
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SST39SF010A-70-4I-U1
SST
Silicon Storage Technology SST
SST39SF010A-70-4I-U1 Datasheet PDF : 22 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
1 Mbit / 2 Mbit / 4 Mbit Multi-Purpose Flash
SST39SF010A / SST39SF020A / SST39SF040
Preliminary Specification
ADDRESS AMS-0
CE#
OE#
TOEH
TCE
TOE
WE#
DQ6
Note
TWO READ CYCLES
Note: Toggle bit output is always high first.
WITH SAME OUTPUTS
AMS = Most significant address
AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040
TOES
398 ILL F07.1
FIGURE 8: TOGGLE BIT TIMING DIAGRAM
SIX-BYTE CODE FOR SECTOR-ERASE
TSE
ADDRESS AMS-0
5555 2AAA
5555
5555
2AAA
SAX
CE#
OE#
WE#
TWP
DQ7-0
AA
55
80
AA
55
30
SW0
SW1
SW2
SW3
SW4
SW5
Note: This device also supports CE# controlled Sector-Erase operation. The WE# and CE# signals are
interchageable as long as minimum timings are met. (See Table 10)
SAX = Sector Address
AMS = Most significant address
AMS = A16 for SST39SF010A, A17 for SST39SF020A, and A18 for SST39SF040
FIGURE 9: WE# CONTROLLED SECTOR-ERASE TIMING DIAGRAM
398 ILL F08.1
©2001 Silicon Storage Technology, Inc.
12
S71147-02-000 5/01 398
 

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