SPT7850 View Datasheet(PDF) - Fairchild Semiconductor
Part Name
Description
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SPT7850 Datasheet PDF : 13 Pages
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ABSOLUTE MAXIMUM RATINGS (Beyond which damage may occur)1 25 °C
Supply Voltages
AVDD ...................................................................... +6 V
DVDD ..................................................................... +6 V
Input Voltages
Analog Input .............................. –0.5 V to AVDD +0.5 V
VREF .............................................................. 0 to AVDD
CLK Input ............................................................... VDD
AVDD – DVDD .................................................. ±100 mV
AGND – DGND .............................................. ±100 mV
ELECTRICAL SPECIFICATIONS
Output
Digital Outputs ................................................... 10 mA
Temperature
Operating Temperature ............................ –40 to 85 °C
Junction Temperature ........................................ 175 °C
Lead Temperature, (soldering 10 seconds) ....... 300 °C
Storage Temperature ............................ –65 to +150 °C
Note: 1. Operation at any Absolute Maximum Rating is not implied. See
Electrical Specifications for proper nominal applied conditions
in typical applications.
TA=TMIN to TMAX, AVDD=DVDD=OVDD=+5.0 V, VIN=0 to 4 V, ƒCLK=40 MHz, ƒS=20 MSPS, VRHS=4.0 V, VRLS=0.0 V, unless otherwise specified.
PARAMETERS
TEST
CONDITIONS
TEST
LEVEL MIN
SPT7850
TYP
MAX
UNITS
Resolution
10
Bits
DC Accuracy
100 kHz clock rate1
Integral Linearity Error (ILE)
V
±1.0
LSB
Differential Linearity Error (DLE)
V
±0.5
LSB
No Missing Codes
VI
Guaranteed
Analog Input
Input Voltage Range
Input Resistance
Input Capacitance
Input Bandwidth
Offset
Gain Error
Reference Input
Resistance
Bandwidth
Voltage Range
VRLS
VRHS
VRHS – VRLS
∆(VRHF – VRHS)
∆(VRLS – VRLF)
Reference Settling Time
VRHS
VRLS
Conversion Characteristics
Maximum Conversion Rate
Minimum Conversion Rate
Pipeline Delay (Latency)
Aperture Delay Time
Aperture Jitter Time
(Small Signal)
VI
VRLS
IV
50
V
V
V
V
VI
400
V
100
IV
0
IV
3.0
V
1.0
V
V
V
V
VI
20
V
IV
V
V
5.0
100
±2.0
±2.0
500
150
4.0
90
75
15
20
50
5
30
VRHS
600
2.0
AVDD
5.0
12
V
kΩ
pF
MHz
LSB
LSB
Ω
MHz
V
V
V
mV
mV
Clock Cycles
Clock Cycles
MHz
kHz
Clock Cycles
ns
ps (p-p)
Dynamic Performance
Effective Number of Bits (ENOB)
ƒIN = 3.58 MHz
ƒIN = 10.3 MHz
Signal-to-Noise Ratio (SNR)
(without Harmonics)
ƒIN = 3.58 MHz
ƒIN = 10.3 MHz
VI
8.8
Bits
VI
8.5
Bits
VI
53
56
dB
VI
52
55
dB
1SPT7850SCN is screened for DC accuracy tests at 100 kHz. SPT7850SIS and SPT7850SCT are screened for DC accuracy tests at 35 MHz.
SPT7850
2
6/15/01
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