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CXD1812Q/R View Datasheet(PDF) - Sony Semiconductor

Part NameDescriptionManufacturer
CXD1812Q/R ATAPI I/F CD-ROM DECODER Sony
Sony Semiconductor Sony
CXD1812Q/R Datasheet PDF : 56 Pages
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CXD1812Q/R
2-22. ATAPI drive select register (address 16HEX)
This register corresponds to the ATAPI drive select register of the host.
The sub CPU can set any optional values in this register when the ATAPI status register -bit 7: BUSY bit is
high.
bit 4:
DRV
2-23. ATA command register (address 17HEX)
This register corresponds to the ATA command register of the host.
The sub CPU can set any optional values in this register when the ATAPI status register -bit 7: BUSY bit is
high. However, the ATAPI soft reset command (08HEX) can be set regardless of the value of the BUSY bit.
2-24. RESERVED (address 18HEX)
2-25. ATAPI status 1 register (address 19HEX)
bit 7, 6: RESERVED
bit 5:
DRDY1 (drive 1 ready)
This bit corresponds to the ATAPI status register -bit 6: DRDY bit of the host.
The DRDY status of the slave drive is set.
bit 4:
DSC1 (drive 1 seek complete)
This bit corresponds to the ATAPI status register -bit 4: DSC bit of the host.
The DSC status of the slave drive is set.
bit 3:
HST5
This bit corresponds to the ATAPI status register -bit 5 of the host.
bit 2:
HST1
This bit corresponds to the ATAPI status register -bit 1 of the host.
bit 1:
DRDY0 (drive 0 ready)
This bit corresponds to the ATAPI status register -bit 6: DRDY bit of the host. The DRDY status of
the master drive is set.
bit 0:
DSC0 (drive 0 seek complete)
This bit corresponds to the ATAPI status register -bit 4: DSC bit of the host.
The DSC status of the master drive is set.
2-26. ATAPI status 2/drive control register (address 1AHEX)
bit 7:
BUSY
This bit corresponds to the ATAPI status register -bit 7 of the host.
This bit must be set high when the sub CPU accesses the group of command block registers.
bit 6:
RESERVED
bit 5:
CORR
This bit corresponds to the ATAPI status register -bit 2 of the host.
bit 4:
ENHINT (enable HINT)
An interrupt to the host can be made by setting this bit high.
bit 3 to 1: RESERVED
bit 0:
CHECK
This bit corresponds to the ATAPI status register -bit 0 of the host.
– 28 –
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