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ACE1001EM8 View Datasheet(PDF) - Fairchild Semiconductor

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ACE1001EM8 Datasheet PDF : 32 Pages
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4.1.1 Accumulator (A)
The Accumulator is a general-purpose 8-bit register that is used
to hold data and results of arithmetic calculations or data manipu-
lations.
4.1.2 X-Pointer (X)
The X-Pointer register allows for an 11-bit indexing value to be
added to an 8-bit offset creating an effective address used for
reading and writing between the entire memory space. (Software
can only read from code EEPROM.) This provides software with
the flexibility of storing lookup tables in the code EEPROM
memory space for the cores accessibility during normal opera-
tion.
The X register is divided into two sections. The 10 least significant
bits (LSB) of the register is the address of the program or data
memory space. The most significant bit (MSB) of the register is
write only and selects between the data (0x000 to 0x0FF) or
program (0xC00 to 0xFFF) memory space.
Example: If Bit 10 = 0, then the LD A, [00,X] instruction will take a
value from address range 0x000 to 0x0FF and load it into A. If Bit
10 = 1, then the LD A, [00,X] instruction will take a value from
address range 0xC00 to 0xFFF and load it into A.
4.1.3 Program Counter (PC)
The 10-bit program counter register contains the address of the
next instruction to be executed. After a reset, if in normal mode the
program counter is initialized to 0xC00.
4.1.4 Stack Pointer (SP)
The ACEx microcontroller has an automatic program stack with a
4-bit stack pointer. The stack can be initialized to any location
between addresses 0x30-0x3F. After a reset, the stack pointer is
defaulted to 0xF pointing to address 0x3F. Normally, the stack
pointer is initialized by one of the first instructions in an application
program.
The stack is configured as a data structure which decrements from
high to low memory. Each time a new address is pushed onto the
stack, the core decrements the stack pointer by two. Each time an
address is pulled from the stack, the core increments the stack
pointer by two. At any given time, the stack pointer points to the
next free location in the stack.
When a subroutine is called by a jump to subroutine (JSR)
instruction, the address of the instruction is automatically pushed
onto the stack least significant byte first. When the subroutine is
finished, a return from subroutine (RET) instruction is executed.
The RET instruction pulls the previously stacked return address
from the stack and loads it into the program counter. Execution
then continues at the recovered return address.
4.1.5 Status Register (SR)
This 8-bit register contains four condition code indicators (C, H, Z,
and N), an interrupt masking bit (G), and an EEPROM write flag
(R). The condition code indicators are automatically updated by
most instructions. (See Table 10)
Carry/Borrow (C)
The carry flag is set if the arithmetic logic unit (ALU) performs a
carry or borrow during an arithmetic operation and by its dedicated
instructions. The rotate instruction operates with and through the
carry bit to facilitate multiple-word shift operations. The LDC and
INVC instructions facilitate direct bit manipulation using the carry
flag.
Half Carry (H)
The half carry flag indicates whether an overflow has taken place
on the boundary between the two nibbles in the accumulator. It is
primarily used for Binary Coded Decimal (BCD) arithmetic calcu-
lation.
Zero (Z)
The zero flag is set if the result of an arithmetic, logic, or data
manipulation operation is zero. Otherwise, it is cleared.
Figure 12: Basic Interrupt Structure
INTR
T1
T0
MIW
T1PND
T0PND
WKPND
Interrupt
Pending
Flags
T1EN
T0INT
EN
WKINT
EN
Interrupt Enable Bits
G
Global Interrupt
Enable
Interrupt
13
ACE1001 Product Family Rev. B.1
www.fairchildsemi.com
 

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