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SN74LVC1G32-Q1 查看數據表(PDF) - Texas Instruments

零件编号SN74LVC1G32-Q1 TI
Texas Instruments TI
产品描述 (功能)SINGLE 2-INPUT POSITIVE-OR GATE


SN74LVC1G32-Q1 Datasheet PDF : 14 Pages
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From Output
Under Test
CL
(see Note A)
SN74LVC1G32-Q1
SINGLE 2-INPUT POSITIVE-OR GATE
SCES648 – FEBRUARY 2006
PARAMETER MEASUREMENT INFORMATION
VLOAD
RL
S1
Open
GND
RL
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
VLOAD
GND
LOAD CIRCUIT
VCC
1.8 V ± 0.15 V
2.5 V ± 0.2 V
3.3 V ± 0.3 V
5 V ± 0.5 V
INPUTS
VI
tr/tf
VCC
2 ns
VCC
2 ns
3 V 2.5 ns
VCC 2.5 ns
VM
VCC/2
VCC/2
1.5 V
VCC/2
VLOAD
2 × VCC
2 × VCC
6V
2 × VCC
CL
30 pF
30 pF
50 pF
50 pF
RL
1 k
500
500
500
V
0.15 V
0.15 V
0.3 V
0.3 V
Input
tw
VI
VM
VM
0V
VOLTAGE WAVEFORMS
PULSE DURATION
Timing Input
Data Input
VI
VM
0V
tsu
VM
th
VI
VM
0V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
Input
VM
VI
VM
0V
tPLH
Output
VM
tPHL
VOH
VM
VOL
tPHL
tPLH
Output
VOH
VM
VM
VOL
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
INVERTING AND NONINVERTING OUTPUTS
Output
Control
VM
VM
tPZL
Output
tPLZ
Waveform 1
S1 at VLOAD
(see Note B)
VM
VOL + V
Output
Waveform 2
S1 at GND
(see Note B)
tPZH
tPHZ
VM
VOH − V
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
LOW- AND HIGH-LEVEL ENABLING
VI
0V
VLOAD/2
VOL
VOH
0 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR 10 MHz, ZO = 50 .
D. The outputs are measured one at a time, with one transition per measurement.
E. tPLZ and tPHZ are the same as tdis.
F. tPZL and tPZH are the same as ten.
G. tPLH and tPHL are the same as tpd.
H. All parameters and waveforms are not applicable to all devices.
Figure 1. Load Circuit and Voltage Waveforms
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DESCRIPTION/ORDERING INFORMATION
This single 2-input positive-OR gate is designed for 1.65-V to 5.5-V V CC operation.
The SN74LVC1G32-Q1 performs the Boolean function Y= A + B or Y =  A • B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

FEATURES
• Qualified for Automotive Applications
• Customer-Specific Configuration Control Can Be Supported Along With Major-Change Approval
• Supports 5-V VCC Operation
• Inputs Accept Voltages to 5.5 V
• Low Power Consumption, 25-µA Max ICC
• ±24-mA Output Drive at 3.3 V
• Ioff Supports Partial-Power-Down Mode Operation

 

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