datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

AD9873 View Datasheet(PDF) - Analog Devices

Part Name
Description
View to exact match
AD9873 Datasheet PDF : 39 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Parameter
12-BIT ADC CHARACTERISTICS (Continued)
Dynamic Performance (AIN = –0.5 dB FS, f = 5 MHz)
Signal-to-Noise and Distortion Ratio (SINAD)
Signal-to-Noise and Distortion Ratio (SINAD)3
Effective Number of Bits (ENOB)
Effective Number of Bits (ENOB)3
Signal-to-Noise Ratio (SNR)
Signal-to-Noise Ratio (SNR)3
Total Harmonic Distortion (THD)
Total Harmonic Distortion (THD)3
Spurious Free Dynamic Range (SFDR)
Spurious Free Dynamic Range (SFDR)3
Differential Phase
Differential Gain
VIDEO CLAMP INPUT
Input Voltage Range
Clamp Current Positive
Clamp Droop Current
Clamp Level Offset Programming Range
Clamp Level Resolution
Carrier Rejection Filter Bandwidth (–3 dB)
Dynamic Performance (AIN = –0.5 dB FS, f = 5 MHz)
Signal-to-Noise and Distortion Ratio (SINAD)
Effective Number of Bits (ENOB)
Signal-to-Noise Ratio (SNR)
Total Harmonic Distortion (THD)
Spurious Free Dynamic Range (SFDR)
Differential Phase
Differential Gain
CHANNEL-TO-CHANNEL ISOLATION
Tx DAC-to-ADC Isolation
(5 MHz Analog Output)
Isolation Between Tx and 8-Bit ADCs
Isolation Between Tx and 10-Bit ADC
Isolation Between Tx and 12-Bit ADC
ADC-to-ADC Isolation
(AIN = –0.5 dB FS, f = 5 MHz)
Isolation Between IF12 and Video
Isolation Between IF10 and IF12
Isolation Between Q in and IF10
Isolation Between Q in and I Inputs
TIMING CHARACTERISTICS (20 pF Load)
Wake-Up Time
Minimum RESET Pulsewidth Low (tRL)
Digital Output Rise/Fall Time
Tx/Rx Interface
MCLK Frequency (fMCLK)
TxSYNC/TxIQ Set Up Time (tSU)
TxSYNC/TxIQ Hold Time (tHD)
RxSYNC/RxIQ/IF to Valid Time (tTV)
RxSYNC/RxIQ/IF Hold Time (tHT)
Serial Control Bus
SCLK Frequency (fSCLK)
Clock Pulsewidth High (tPWH)
Clock Pulsewidth Low (tPWL)
Clock Rise/Fall Time
Data/Chip-Select Setup Time (tDS)
Data Hold Time (tDH)
Data Valid Time (tDV)
REV. 0
Test
Temp Level Min Typ
AD9873
Max Unit
Full
III
Full
IV
Full
III
Full
IV
Full
III
Full
IV
Full
III
Full
IV
Full
III
Full
IV
25ЊC
IV
25ЊC
IV
Full
IV
25ЊC
IV
25ЊC
IV
25ЊC
III
25ЊC
IV
25ЊC
IV
Full
IV
Full
IV
Full
IV
Full
IV
Full
IV
25°C
IV
25°C
IV
62.3 65
67.4
10.0 10.5
10.8
63.3 65.3
67.4
–77.6
–77.6
65.7 80
80
<0.1
<1
2
1.3
2
256 512
16
0.6
52
8.34
61.0
–53.0
55.0
<0.1
<8
–65.4
dB
dB
Bits
Bits
dB
dB
dB
dB
dB
dB
Degree
LSB
2032
V
mA
A
LSB
LSB
MHz
dB
Bits
dB
dB
dB
Degree
LSB
25ЊC
IV
>80
25ЊC
IV
>85
25ЊC
IV
>90
25ЊC
III
25ЊC
IV
25ЊC
IV
25ЊC
IV
70
>70
>80
>80
>70
N/A
N/A
N/A
N/A
5
25ЊC
III
2.8
25ЊC
III
25ЊC
III
3
25ЊC
III
3
25ЊC
III
25ЊC
III
0.2
Full
III
Full
III
30
Full
III
30
Full
III
Full
III
25
Full
III
0
Full
III
–5–
dB
dB
dB
dB
dB
dB
dB
200 tMCLK Cycles
tMCLK Cycles
4
ns
66
MHz
ns
ns
5.2 ns
ns
15
MHz
ns
ns
1
ms
ns
ns
30
ns
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]