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SN54LS107A View Datasheet(PDF) - Motorola => Freescale

Part NameDescriptionManufacturer
SN54LS107A DUAL JK NEGATIVE EDGE-TRIGGERED FLIP-FLOP Motorola
Motorola => Freescale Motorola
SN54LS107A Datasheet PDF : 4 Pages
1 2 3 4
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
The SN54 / 74LS107A is a Dual JK Flip-Flop with individual J, K, Direct
Clear and Clock Pulse inputs. Output changes are initiated by the
HIGH-to-LOW transition of the clock. A LOW signal on CD input overrides the
other inputs and makes the Q output LOW.
The SN54 / 74LS107A is the same as the SN54 / 74LS73A but has corner
power pins.
SN54/74LS107A
DUAL JK NEGATIVE
EDGE-TRIGGERED FLIP-FLOP
LOW POWER SCHOTTKY
CONNECTION DIAGRAM DIP (TOP VIEW)
VCC CD1 CP1 K2 CD2 CP2 J2
14 13 12 11 10 9
8
1
2
3
4
5
6
7
J1 Q1 Q1 K1 Q2 Q2 GND
NOTE:
The Flatpak version has the
same pinouts (Connection
Diagram) as the Dual In-Line
Package.
14
1
14
1
J SUFFIX
CERAMIC
CASE 632-08
N SUFFIX
PLASTIC
CASE 646-06
LOGIC SYMBOL
1
2
1
J
Q
3
8
J
Q
5
12
CP
9
CP
4
K
Q
2
CD
11
K
Q
CD
6
13
10
VCC = PIN 14
GND = PIN 7
14
1
D SUFFIX
SOIC
CASE 751A-02
ORDERING INFORMATION
SN54LSXXXJ Ceramic
SN74LSXXXN Plastic
SN74LSXXXD SOIC
GUARANTEED OPERATING RANGES
Symbol
Parameter
VCC
Supply Voltage
TA
Operating Ambient Temperature Range
IOH
Output Current — High
IOL
Output Current — Low
Min
Typ
Max
Unit
54
4.5
5.0
5.5
V
74
4.75
5.0
5.25
54
– 55
25
125
°C
74
0
25
70
54, 74
– 0.4
mA
54
4.0
mA
74
8.0
FAST AND LS TTL DATA
5-177
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