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SMB113A View Datasheet(PDF) - Summit Microelectronics

Part NameDescriptionManufacturer
SMB113A High-power, Four-channel Programmable DC-DC System Power Managers Summit-Microelectronics
Summit Microelectronics Summit-Microelectronics
SMB113A Datasheet PDF : 32 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
CVIOMNM_CTPH2E[_0CR,1H,N2[0,3,A1],2L,3]BLOCK DIAGRAM
100k
I2C/SMBUS
SDA
SCL
z
z
+ OA
z
CLAMP
COMP1_CH[0,1,2,3]
VREF
DIGITAL TO
ANALOG
CONVERTER
VBATT
VDDCAP
VDD_CAP 2.5V
REGULATOR
z
z
+
LEVEL
SHIFTER
+
VREF
BANDGAP VREF
z
z+
UV2 z
zD Q
LEVEL
SHIFTER
VREF
+
UV1z
+
DUTY
CYCLE
LIMIT
OSC
Fixed 250/400/
800/1000kHz
MAX LIMIT
LOW LIMIT
GLITCH
FILTER
OVER VOLTAGE
DETECTION
GLITCH
FILTER
UNDER VOLTAGE
DETECTION
SMB113A/B/SMB117/A
Preliminary Information
Channel 0,1,2,3
Synchronous buck
PWM Converter
HVSUP[0,1,2,3]
HSDRV[0,1,2,3]
DEADTIME
SEQUENCING
AND
MONITORING
LOGIC
ENABLE
LSDRV[0,1,2,3]
PWREN0
GND
Figure 3 –SMB113A/B and SMB117/A internal block diagram. Programmable functional blocks include: level
shifters, digital to analog converter and the VM_CH[0,1,2,3] voltage dividers.
Summit Microelectronics, Inc
2111 2.6 9/16/2010
4
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