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SFC05-4 View Datasheet(PDF) - Semtech Corporation

Part NameDescriptionManufacturer
SFC05-4 ChipClamp™ Flip Chip TVS Diode Array Semtech
Semtech Corporation Semtech
SFC05-4 Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
PROTECTION PRODUCTS
Applications Information
Device Connection Options
The SFC05-4 has solder bumps located in a 3 x 2
matrix layout on the active side of the device. The
bumps are designated by the numbers 1 - 3 along the
horizontal axis and letters A - B along the vertical axis.
The lines to be protected are connected at bumps A1,
B1, A3, and B3. Bumps A2 and B2 are connected to
ground. All path lengths should be kept as short as
possible to minimize the effects of parasitic inductance
in the board traces.
Flip Chip TVS
Flip chip TVS devices are wafer level chip scale pack-
ages. They eliminate external plastic packages and
leads and thus result in a significant board space
savings. Manufacturing costs are minimized since they
do not require an intermediate level interconnect or
interposer layer for reliable operation. Their compatibil-
ity with current pick and place equipment further
reduces manufacturing costs. Certain precautions and
design considerations have to be observed, however,
for maximum solder joint reliability. These include
solder pad definition, board finish, and assembly
parameters.
Printed Circuit Board Mounting
Non-solder mask defined (NSMD) land patterns are
recommended for mounting the SFC05-4. Solder
mask defined (SMD) pads produce stress points near
the solder mask on the PCB side that can result in
solder joint cracking when exposed to extreme fatigue
conditions. The recommended pad size is 0.225 ±
0.010 mm with a solder mask opening of 0.350 ±
0.025 mm.
Grid Courtyard
The recommended grid placement courtyard is 1.3 x
1.8 mm. The grid courtyard is intended to encompass
the land pattern and the component body that is
centered in the land pattern. When placing parts on a
PCB, the highest recommended density is when one
courtyard touches another.
SFC05-4
PRELIMINARY
Device Schematic and Pin Configuration
Layout Example
To Protected IC
To Protected IC
Ground
To Connector
NSMD Package Footprint
2004 Semtech Corp.
5
www.semtech.com
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