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SCA1000 View Datasheet(PDF) - Murata Manufacturing

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SCA1000 Datasheet PDF : 14 Pages
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SCA1000 Series
MASTER
MICROCONTROLLER
DATA OUT (MOSI)
DATA IN (MISO)
SERIAL CLOCK (SCK)
SS0
SS1
SS2
SS3
Figure 5. Typical SPI connection
SLAVE
SI
SO
SCK
CS
SI
SO
SCK
CS
SI
SO
SCK
CS
SI
SO
SCK
CS
The SPI interface in Murata products is designed to support any micro controller that uses SPI bus.
Communication can be carried out by either a software or hardware based SPI. Please note that in
the case of hardware based SPI, the received acceleration data is 11 bits. The data transfer uses
the following 4-wire interface:
MOSI
MISO
SCK
CSB
master out slave in
master in slave out
serial clock
chip select (low active)
µP → SCA1000
SCA1000 µP
µP → SCA1000
µP → SCA1000
Each transmission starts with a falling edge of CSB and ends with the rising edge. During
transmission, commands and data are controlled by SCK and CSB according to the following rules:
commands and data are shifted; MSB first, LSB last
each output data/status bits are shifted out on the falling edge of SCK (MISO line)
each bit is sampled on the rising edge of SCK (MOSI line)
after the device is selected with the falling edge of CSB, an 8-bit command is received. The
command defines the operations to be performed
the rising edge of CSB ends all data transfer and resets internal counter and command register
if an invalid command is received, no data is shifted into the chip and the MISO remains in high
impedance state until the falling edge of CSB. This reinitializes the serial communication.
data transfer to MOSI continues immediately after receiving the command in all cases where
data is to be written to SCA1000’s internal registers
data transfer out from MISO starts with the falling edge of SCK immediately after the last bit of
the SPI command is sampled in on the rising edge of SCK
maximum SPI clock frequency is 500kHz
maximum data transfer speed for RDAX and RDAY is 5300 samples per sec / channel
Murata Electronics Oy
www.muratamems.fi
Subject to changes
Doc. nr. 82 1566 00
8/14
Rev.A
 

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