NXP Semiconductors
22. Figures
Fig 1.
Fig 2.
Fig 3.
Fig 4.
Fig 5.
Fig 6.
Fig 7.
Fig 8.
Fig 9.
Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . .5
Pin configuration . . . . . . . . . . . . . . . . . . . . . . . . . .6
X-port input and output timing . . . . . . . . . . . . . . .18
I-port output timing, also valid for IX-port and
H-port. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .18
Oscillator applications (see Table 9) . . . . . . . . . .20
32 bits of identification code. . . . . . . . . . . . . . . . .22
Package outline HTQFP100 (SOT638-1). . . . . . .23
Package outline TFBGA160 (SOT1016-1). . . . . .24
Temperature profiles for large and small
components . . . . . . . . . . . . . . . . . . . . . . . . . . . . .27
SAF7115
Multistandard video decoder
SAF7115_1
Product data sheet
Rev. 01 — 15 October 2008
© NXP B.V. 2008. All rights reserved.
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