Philips Semiconductors
CS-PD Hamburg
CVIP2
Datasheet
SAA7115
Date:
Version:
10/23/01
0.67
CE
XTALO
LLCINT
RESINT
LLC
RES
(internal
reset)
CLOCK
PLL
LLC
CE
POC VDDA
ANALOG
POC VDDD
DIGITAL
POC
LOGIC
POC
DELAY
RESINT
CLK0
RES
some ms
20 to 200 µs
PLL-delay
<1 ms
896 LCC
digital delay
128 LCC
MHB331
POC = Power-on Control.
CE = chip enable input.
XTALO = crystal oscillator output.
LLCINT = internal system clock.
RESINT = internal reset.
LLC = line-locked clock output, occurs also on pins XCLK and/or ICLK if enabled via pull up resistor on XTRI and/or ITRI.
RES = reset output.
Fig.21 Power-on control circuit.
Confidential - NDA required
Filename: SAA7115_Datasheet.fm
page 42
Last edited by H. Lambers