SAA7115 View Datasheet(PDF) - Philips Electronics

Part Name

Description

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SAA7115

PAL/NTSC/SECAM Video Decoder with Adaptive PAL/NTSC Comb Filter, High Performance Scaler, I2C Sliced Data Readback and SQ Pixel Output

Philips Electronics 

Philips Semiconductors

CS-PD Hamburg

CVIP2

Datasheet

SAA7115

Date:

Version:

10/23/01

0.67

+255

+209

white

+255

+199

white

LUMINANCE

LUMINANCE

+71

black

+60

black shoulder

SYNC

1

sync bottom

a. Sources containing 7.5 IRE black level offset

(e.g. NTSC M).

+60

black shoulder = black

SYNC

1

sync bottom

MGD700

b. Sources not containing black level offset.

CVBS levels with default settings RAWG[7:0] = 64 and RAWO[7:0] = 128.

Equation for modification of the raw data levels via bytes RAWG and RAWO:

CVBSOUT = Int R-----A-6---W-4----G---- × (CVBSnom – 128) + RAWO

It should be noted that the resulting levels are limited to 1 to 254 in accordance with “ITU Recommendation 601/656”.

Fig.19 CVBS (raw data) range for scaler input, data slicer and X-port output.

8.1.3 SYNCHRONIZATION

The prefiltered luminance signal is fed to the synchronization stage. Its bandwidth is further reduced to 1 MHz in a

low-pass filter. The sync pulses are sliced and fed to the phase detectors where they are compared with the sub-divided

clock frequency. The resulting output signal is applied to the loop filter to accumulate all phase deviations. Internal signals

(e.g. HCL and HSY) are generated in accordance with analog front-end requirements. The loop filter signal drives an

oscillator to generate the line frequency control signal LFCO; see Fig.20.

The detection of ‘pseudo syncs’ as part of the macrovision copy protection standard is also achieved within the

synchronization circuit.

The result is reported as flag COPRO within the decoder status byte at subaddress 1FH.

8.1.4 CLOCK GENERATION CIRCUIT

The internal CGC generates all clock signals required for the video input processor.

The internal signal LFCO is a digital-to-analog converted signal provided by the horizontal PLL. It is the multiple of the

line frequency:

6.75 MHz = 429 × fH (50 Hz), or

6.75 MHz = 432 × fH (60 Hz).

Confidential - NDA required

Filename: SAA7115_Datasheet.fm

page 39

Last edited by H. Lambers

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