Philips Semiconductors
CS-PD Hamburg
CVIP2
Datasheet
SAA7115
Date:
Version:
10/23/01
0.67
8 FUNCTIONAL DESCRIPTION
8.1 Decoder
8.1.1 ANALOG INPUT PROCESSING
The SAA7115 offers six analog signal inputs, two analog main channels with source switch, clamp circuit, analog
amplifier, anti-alias filter and video 9-bit CMOS ADC with a Decimation Filter (DF); see Figs 4 and 7.
The anti-alias filters are adapted to the line-locked clock frequency via a filter control circuit. The characteristic is shown
in Fig.3. During the vertical blanking period gain and clamping control are frozen.
6
V
(dB)
0
−6
−12
−18
−24
−30
−36
−42
0
2
4
MGD138
6
8
10
12
14
f (MHz)
Fig.3 Anti-alias filter.
Confidential - NDA required
Filename: SAA7115_Datasheet.fm
page 21
Last edited by H. Lambers