datasheetbank_Logo
Integrated circuits, Transistor, Semiconductors Search and Datasheet PDF Download Site

TDA8310 View Datasheet(PDF) - Philips Electronics

Part Name
Description
View to exact match
TDA8310 Datasheet PDF : 24 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Philips Semiconductors
PAL/NTSC colour processor for
PIP applications
Preliminary specification
TDA8310
FUNCTIONAL DESCRIPTION
Vision IF amplifier
The IF amplifier contains three AC-coupled control stages
with a total gain control range >60 dB. The sensitivity of
the circuit is comparable with that of modern IF-ICs. The
demodulation of the IF signal is achieved by a multiplier.
The demodulator is alignment-free and does not require
external components.
The polarity of the demodulator can be switched to make
the circuit suitable for positive and negative modulated
signals.
The AGC detector operates on top-sync or top white-level
depending on the position of the demodulator. The AGC
detector time-constant capacitor is externally connected to
facilitate flexibility of the application. During positive
modulation the time-constant of the AGC system is too
long to avoid visible variations of the signal amplitude. To
obtain an acceptable speed of the AGC system a circuit
has been included which detects whether the AGC
detector is activated every frame period. When no action
is detected during three frame periods the speed of the
system is increased.
Synchronization circuit
The sync separator is preceded by a voltage controlled
amplifier which adjusts the sync pulse amplitude to a fixed
level. The sync pulses are then fed to the slicing stage
(separator) which operates at 50% of the amplitude.
The separated sync pulses are fed to the first phase
detector and to the coincidence detector. The coincidence
detector is used to detect whether the line oscillator is
synchronized and for transmitter identification. The first
PLL has a very high static steepness, this ensures that the
phase of the picture is independent of the line frequency.
The line oscillator operates at twice the line frequency.
The oscillator network is internal. Because of the spread of
internal components an automatic adjustment circuit has
been added to the IC.
The circuit compares the oscillator frequency with that of
the crystal oscillator in the colour decoder. This results in
a free-running frequency which deviates less than 2% from
the typical value.
The horizontal output pulse is derived from the horizontal
oscillator via a pulse shaper. The pulse width of the output
pulse is 5.4 µs, the front edge of this pulse coincides with
the front edge of the sync pulse at the input.
The vertical output pulse is generated by a count-down
circuit. The pulse width is approximately 380 µs. Both the
horizontal and vertical pulses will always be available at
the outputs even when no input signal is available.
In addition to the horizontal and vertical sync pulse outputs
the IC has a sandcastle pulse output which contains burst
key and blanking pulses.
Integrated video filters
The circuit contains a chrominance bandpass and trap
circuit. The filters are realised by gyrator circuits that are
automatically tuned by comparing the tuning frequency
with the crystal frequency of the decoder. When a Y/C
signal is supplied to the input the chrominance trap is
automatically switched off by the Y/C detection circuit, but
it is also possible to force the filters in the CVBS or Y/C
position.
The luminance delay line is also realised by gyrator
circuits.
Colour decoder
The colour decoder contains an alignment-free crystal
oscillator, a colour killer circuit and colour difference
demodulators. The 90° phase shift for the reference signal
is achieved internally.
The colour decoder is very flexible. Together with the
SECAM decoder TDA8395 an automatic multistandard
decoder can be designed but it is also possible to use it for
one standard when only one crystal is connected to the IC.
The decoder can be forced to one of the standards via the
“forced mode” pins. The crystal pins which are not used
must be connected to the positive supply line via a 8.2 k
resistor. It is also possible to connect the non-used pins
with one resistor to the positive supply line. In this event
the resistor must have a value of 8.2 kdivided by the
number of pins.
The chrominance output signal of the video switch is
externally available and must be used as an input signal
for the SECAM decoder.
RGB/YUV switch
The RGB/YUV switch is for switching between two RGB or
YUV video sources. The outputs of the switch can be set
to high impedance state so that other switches can be
used in parallel.
The switch is controlled via pins 13 and 52. The details of
switch control are shown in Table 5.
February 1995
7
 

Share Link: 

datasheetbank.com [ Privacy Policy ] [ Request Datasheet ] [ Contact Us ]