Soft Start for Synchronous Buck Converter
A built-in soft-start is used to prevent surge current from
power supply input during power on (referring to the
Functional Block Diagram). The error amplifier EA is a three-
input device. SSE or VREF1 whichever is smaller dominates
the behavior non-inverting input. The internal soft start
voltage SSE linearly ramps up to about 4V after VIN1
existence is recognized with about 2ms delay. According,
the output voltage ramps up smoothly to its target level.
The rise time of output voltage is about 2ms as shown in
Figure 3. VREF1 takes over the behavior EA when SSE >
SSE is also used for LDO soft start. LDO input voltage
VIN2 MUST be ready before SSE starts to ramp up.
Otherwise UVP function of LDO may be triggered and shut
down the RT9259C.
VIN1 = 12V to 0V
Figure 4. UVP triggered by FB
VIN2 = 0V
Figure 5. UVP Hiccups Triggered by FBL
Figure 3 : Start Up by RT_DIS
Under Voltage Protection
The voltages at FB and FBL pin are monitored for under
voltage protection (UVP) after the soft start is completed.
UVP is triggered if one of the feedback voltages is under
(50% x VREFX) with a 30us delay. As shown in Figure 4,
the RT9259C PWM controller is shut down when VFB drops
lower than the UVP threshold. In Figure 5, the RT9259C
shuts down after 4 time UVP hiccups triggered by FBL.
Over Current Protection
The RT9259C senses the current flowing through lower
MOSFET for over current protection (OCP) by sensing the
PHASE pin voltage as shown in the Functional Block
Diagram. A 40uA current source flows through internal 20kΩ
ROCSET to PHASE pin causes 0.8V voltage drop across
the resistor. OCP is triggered if the voltage at PHASE pin
(drop of lower MOSFET VDS) is lower than −0.4V when low
side MOSFET conducting. Accordingly inductor current
threshold for OCP is a function of conducting resistance
of lower MOSFET RDS(ON) as :
40μA × ROCSET (20kΩ) - 0.4V
DS9259C-03 August 2007