RT8859M View Datasheet(PDF) - Richtek Technology
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RT8859M Datasheet PDF : 51 Pages
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RT8859M
Thermal Considerations
For continuous operation, do not exceed absolute
maximum junction temperature. The maximum power
dissipation depends on the thermal resistance of the IC
package, PCB layout, rate of surrounding airflow, and
difference between junction and ambient temperature. The
maximum power dissipation can be calculated by the
following formula :
PD(MAX) = (TJ(MAX) − TA) / θJA
where TJ(MAX) is the maximum junction temperature, TA is
the ambient temperature, and θJA is the junction to ambient
thermal resistance.
For recommended operating condition specifications, the
maximum junction temperature is 125°C. The junction to
ambient thermal resistance, θJA, is layout dependent. For
WQFN-56L 7x7 packages, the thermal resistance, θJA, is
31°C/W on a standard JEDEC 51-7 four-layer thermal test
board. The maximum power dissipation at TA = 25°C can
be calculated by the following formula :
PD(MAX) = (125°C − 25°C) / (31°C/W) = 3.226W for
WQFN-56L 7x7 package
The maximum power dissipation depends on the operating
ambient temperature for fixed TJ (MAX) and thermal
resistance, θJA. The derating curve in Figure 26 allows
the designer to see the effect of rising ambient temperature
on the maximum power dissipation.
3.5
Four Layers PCB
3.0
2.5
2.0
1.5
1.0
0.5
0.0
0
25
50
75
100
125
Ambient Temperature (°C)
Figure 26. Derating Curve of Maximum Power
Dissipation
Layout Considerations
Careful PC board layout is critical to achieve low switching
losses and clean, stable operation. The switching power
stage requires particular attention. If possible, mount all
of the power components on the top side of the board
with their ground terminals flushed against one another.
Follow these guidelines for optimum PC board layout :
` Keep the high current paths short, especially at the
ground terminals.
` Keep the power traces and load connections short. This
is essential for high efficiency.
` When trade-offs in trace lengths must be made, it’s
preferable to let the inductor charging path be longer
than the discharging path.
` Place the current sense component close to the
controller. ISENxP and ISENxN connections for current
limit and voltage positioning must be made using Kelvin
sense connections to guarantee current sense accuracy.
The PCB trace from the sense nodes should be
paralleled back to the controller.
` Route high speed switching nodes away from sensitive
analog areas (COMP, FB, ISENxP, ISENxN, etc...)
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS8859M-05 July 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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