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RT8859M View Datasheet(PDF) - Richtek Technology

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RT8859M Datasheet PDF : 51 Pages
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RT8859M
The RT8859M will NOT take any action even when the VR
output current or temperature exceeds its maximum
setting at these ADC pins. The maximum level settings
at these ADC pins are different from over current protection
or over temperature protection. In other words, these
maximum level setting pins are only for platform users to
define their system operating conditions and these
messages will only be utilized by the CPU.
VINITIAL Setting
The initial startup voltage of the RT8859M can be set by
platform users through the SETINI and the SETINIA pins.
Voltage divider circuits are recommended to be applied to
the SETINI and the SETINIA pins. The initial startup voltage
relates to the SETINI pin voltage setting as shown in Table
4. Recommended voltage setting at the SETINIA pin is
also shown in Table 4.
Table 4. SETINI (SETINIA) Pin Setting
Initial Startup
Voltage
1.5V
1.1V
1V
0.9V
0V
Recommended SETINI Pin
Voltage
7
8
x
VCC
4.375V
5
8
x
VCC
3.125V
3 x VCC 1.875V
8
3 x VCC 0.9375V
16
1 x VCC 0.3125V or GND
16
Start-Up Sequence
The RT8859M utilizes an internal soft-start sequence which
strictly follows Intel VR12/IMVP7 start-up sequence
specifications. After POR = high and EN = high, the
controller considers all the power inputs ready and enters
start-up sequence. If VINITIAL = 0, VOUT is programmed to
stay at 0V for 2ms waiting for SVID command. If VINITIAL
0 , VOUT will ramp up to VINITIAL voltage (which is not
zero) immediately after both POR = high and EN= high.
After VOUT reaches target VINITIAL, VOUT will stay at VINITIAL
waiting for SVID command. After the RT8859M receives
valid VID code (typically SetVID_Slow command), VOUT
will ramp up to the target voltage with specified slew rate
(see section Data and Configuration Register). After
VOUT reaches target voltage (VID voltage for VINITIAL = 0 or
VINITIAL for VINITIAL 0), the RT8859M will send out
VR_RDY signal to indicate that the power state of the
RT8859M is ready. The VR ready circuit is an open-drain
structure, so a pull-up resistor connected to a voltage
source is recommended.
Power Down Sequence
Similar to the start-up sequence, the RT8859M also
utilizes a soft shutdown mechanism during turn-off. After
EN = low, the internal reference voltage (positive terminal
of compensation EA) starts ramping down with 3.125mV/
μs slew rate, and VOUT will follow the reference voltage to
0V. After VOUT drops below 0.2V, the RT8859M shuts down
and all functions (drivers) are disabled. The VR_RDY and
VRA_RDY will be pulled down immediately after POR =
low or EN = low.
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS8859M-05 July 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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