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RT8856 View Datasheet(PDF) - Richtek Technology

Part NameDescriptionManufacturer
RT8856 Multi-Phase PWM Controller for CPU Core Power Supply Richtek
Richtek Technology Richtek
RT8856 Datasheet PDF : 23 Pages
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RT8856
REQU, T = R1a // RNTC, T
(25)
For example, the following design parameters are given :
DCR =1mΩ, VCC = 5V, IL, Ripple = 5A
ROC1a = RNTC, 25 = 10kΩ, βNTC = 2400
For 20°C to 100°C operation range, to set OCP trip current
ITRIP = 57A when operating with maximum phases :
ILIM
=
57A
2
+
5A
=
33.5A
VOCSET, 25 = 25 × 33.5A × 1mΩ = 0.8375V
RNTC, 20 =41.89kΩ, RNTC, 100 = 1.98kΩ
RSENSE, 20 =0.82 mΩ, RSENSE, 100 =1.29mΩ
ROC2 = 2.437kΩ, ROC1b = 7.113kΩ
Over Voltage Protection (OVP)
The OVP circuit is triggered under two conditions :
` Condition 1 : When VVSEN exceeds 1.55V.
` Condition 2 : When VVSEN exceeds VDAC by 200mV.
If either condition is valid, the RT8856 latches the
LGATEx =1 and UGATEx = 0 as crowbar to the output
voltage of VR. Turning on all LS_FETs can lead to very
large reverse inductor current and potentially result in
negative output voltage of VR. To prevent damage of the
CPU by negative voltage, the RT8856 turns off all LS_FETs
when VVSEN has fallen below 100mV.
Under Voltage Protection (UVP)
If VVSEN is less than VDAC by 300mV or more, a UVP fault
is latched and the RT8856 turns off both upper side and
lower side MOSFETs. VVSEN is monitored after UVP is
valid. When VVSEN falls below 200mV, a discharging
resistor at VSEN will be enabled.
Negative Voltage Protection (NVP)
During shutdown or protection state, when VVSEN is lower
than 100mV, the controller will force LGATEx = 0 and
UGATEx = 0 for preventing negative voltage. Once VVSEN
recovers to be more than 0mV, NVP will be suspended
and LGATEx = 1 will be enabled again.
Over Temperature Protection (OTP)
Over Temperature Protection prevents the VR from
damage. OTP is considered to be the final protection stage
against overheating of the VR. The thermal throttling VRTT
should be set to assert prior to OTP to manage the VR
power. When this measure is insufficient to keep the die
temperature of the controller below the OTP threshold,
OTP will be asserted and latched. The die temperature of
the controller is monitored internally by a temperature
sensor. As a result of OTP triggering, a soft shutdown will
be launched and VVSEN will be monitored. When VVSEN is
less than 200mV, the driver remains in high impedance
state and the discharging resistor at VSEN pin will be
enabled. A reset can be executed by cycling VCC or
VRON.
Thermal Throttling Control
Intel IMVP6.5 technology supports thermal throttling of
the processor to prevent catastrophic thermal damage.
The RT8856 includes a thermal monitoring circuit to detect
an exceeded user defined temperature on a VR point.
The thermal monitoring circuit senses the voltage change
across the NTC pin. Figure 8 shows the principle of setting
the temperature threshold. Connect an external resistive
voltage divider between Vcc and GND. This divider uses a
Negative Temperature Coefficient (NTC) thermistor and a
resistor. The joint of the voltage divider is connected to
the NTC pin in order to generate a voltage that is
proportional to the temperature. The RT8856 pulls VRTT
low if the voltage on the NTC pin is greater than 0.8 x VCC.
The internal VRTT comparator has a hysteresis of 100mV
to prevent high frequency VRTT oscillation when the
temperature is near the setting point. The minimum
assertion/de-assertion time for VRTT toggling is 1.5ms.
RT8856
VRTT
VCC
+
CMP
-
NTC
0.8 x VCC
ROC1b
ROC2
Figure 8. Thermal Throttling Setting Principle
www.richtek.com
20
DS8856-03 June 2011
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