MTV230MV64 View Datasheet(PDF) - Myson Century Inc

Part Name

Description

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MTV230MV64

8051 Embedded LCD Monitor Controller with Flash OSD

Myson Century Inc 

MYSON

TECHNOLOGY

MTV230M

(Rev 1.0)

8051 Embedded LCD Monitor Controller

with Flash OSD

FEATURES

• 8051 core, 12MHz operating frequency with double CPU clock option, 3.3V power supply.

• 1024-byte RAM, 64K-byte program Flash-ROM.

• Maximum 4 channels of 5V open-drain PWM DAC.

• Maximum 32 bi-directional I/O pins.

• SYNC processor for composite separation/insertion, H/V polarity/frequency check and polarity adjustment.

• Built-in low power reset circuit.

• Compliant with VESA DDC2B/2Bi/2B+ standard.

• Dual slave IIC addresses.

• Single master IIC interface for internal device communication.

• Maximum 4-channel 6-bit ADC.

• Watchdog timer with programmable interval.

• OSD controller features:

. Full-screen display consists of 15 (rows) by 30 (columns) characters.

. Programmable OSD menu positioning for display screen center.

. 512 Flash-ROM fonts, with 12x18 dot matrix, including 480 standard fonts and 32 multi-color fonts.

. Character (per row) and window intensity control.

. Character bordering, shadowing and blinking effect.

. Character height control (18 to 71 lines), double height and/or width control.

. 4 programmable windows with multi-level operation and programmable shadowing width/height/color.

• In System Programming function (ISP).

• 42-pin SDIP or 44-pin PLCC/QFP package.

GENERAL DESCRIPTIONS

The MTV230M micro-controller is an 8051 CPU core embedded device specially tailored to LCD Monitor

applications. It includes an 8051 CPU core, 1024-byte SRAM, OSD controller, 4 built-in PWM DACs, VESA

DDC interface, 4-channel A/D converter, a 64K-byte internal program Flash-ROM and a 9K-word internal

OSD character Flash-ROM.

BLOCK DIAGRAM

P1.0-7

P3.0-2

P3.4-5

P4.0-7

P5.0-7

P0.0-7

P2.0-3

RD

WR

8051

ALE

INT1

CORE

RST

X1

X2

P0.0-7

P2.0-3

RD

WR

ALE

INT1

XFR

AD0-3 ADC

PWM DAC

DA0-3

OSD

CONTROL

OSDHS

OSDVS

XIN

ROUT

GOUT

BOUT

FBKG

INT

H/VSYNC

CONTROL

HSYNC

VSYNC

HBLANK

VBLANK

DDC & IIC

INTERFACE

ISCL

ISDA

HSCL

HSDA

This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without

notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.

Revision 1.0

- 1-

2000/11/15

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