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Q32M210 View Datasheet(PDF) - ON Semiconductor

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Q32M210 Datasheet PDF : 50 Pages
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Q32M210
Table 1. PIN DEFINITIONS
Pin
140
TLLGA
Pin Name
(Note 6)
Type
(Note 1)
Direction
(Note 2)
Pullup /
PullDown
(Note 3)
Pin Power
Supply
Primary
(Note 4)
Function
Alternate 1 Alternate 2
B4
USBDP
D
I/O
VDDUSB
USBDP
A5
USBDN
D
I/O
VDDUSB
USBDN
B44
SCL
D
I/O
PU
VDDIO0
SCL
A51
SDA
D
I/O
PU
VDDIO0
SDA
A48
IF0.0
D
I/O
PU
VDDIO0
SPI0_CLK
GPIO32
A53
IF0.1
D
I/O
PU
VDDIO0
SPI0_CS
GPIO33
USRCLK0
A57
IF0.2
D
I/O
PU
VDDIO0
SPI0_SI
GPIO34
USRCLK1
A56
IF0.3
D
I/O
PU
VDDIO0
SPI0_SO
GPIO35
USRCLK2
A47
IF1.0
D
I/O
PU
VDDIO0
SPI1_CLK
GPIO36
PCM_CLK
B39
IF1.1
D
I/O
PU
VDDIO0
SPI1_CS
GPIO37
PCM_FR
A52
IF1.2
D
I/O
PU
VDDIO0
SPI1_SI
GPIO38
PCM_SI
B45
IF1.3
D
I/O
PU
VDDIO0
SPI1_SO
GPIO39
PCM_SO
B48
IF2.0
D
I/O
PU
VDDIO0
UART0_TX
GPIO40
A49
IF2.1
D
I/O
PU
VDDIO0
UART0_RX
GPIO41
B41
IF3.0
D
I/O
PU
VDDIO0
UART1_TX
GPIO42
SQI_SIO[2]
A54
IF3.1
D
I/O
PU
VDDIO0
UART1_RX
GPIO43
SQI_SIO[3]
A2
IF4.0
M
I/O
PD
VDDIO1
GPIO0
COM0
A1
IF4.1
M
I/O
PD
VDDIO1
GPIO1
COM1
B1
IF4.2
M
I/O
PD
VDDIO1
GPIO2
COM2
A76
IF4.3
M
I/O
PD
VDDIO1
GPIO3
COM3
B64
IF4.4
M
I/O
PD
VDDIO1
GPIO4
SEG0
A75
IF4.5
M
I/O
PD
VDDIO1
GPIO5
SEG1
B63
IF4.6
M
I/O
PD
VDDIO1
GPIO6
SEG2
A74
IF4.7
M
I/O
PD
VDDIO1
GPIO7
SEG3
A72
IF4.8
M
I/O
PD
VDDIO1
GPIO8
SEG4
B61
IF4.9
M
I/O
PD
VDDIO1
GPIO9
SEG5
B60
IF4.10
M
I/O
PD
VDDIO1
GPIO10
SEG6
A70
IF4.11
M
I/O
PD
VDDIO1
GPIO11
SEG7
B59
IF4.12
M
I/O
PD
VDDIO1
GPIO12
SEG8
A69
IF4.13
M
I/O
PD
VDDIO1
GPIO13
SEG9
B58
IF4.14
M
I/O
PD
VDDIO1
GPIO14
SEG10
A68
IF4.15
M
I/O
PD
VDDIO1
GPIO15
SEG11
B57
IF4.16
M
I/O
PD
VDDIO1
GPIO16
SEG12
A67
IF4.17
M
I/O
PD
VDDIO1
GPIO17
SEG13
B56
IF4.18
M
I/O
PD
VDDIO1
GPIO18
SEG14
A66
IF4.19
M
I/O
PD
VDDIO1
GPIO19
SEG15
B55
IF4.20
M
I/O
PD
VDDIO1
GPIO20
SEG16
A65
IF4.21
M
I/O
PD
VDDIO1
GPIO21
SEG17
1. Types: D – Digital, M – Mixed signal, A – Analog, S – Supply
2. Direction: I Input, O – Output, I/O – Input or Output
3. PU – Pullup, PD – Pulldown. Most Pullup and Pulldowns may be disconnected in firmware
4. Primary function is the poweron default. Alternate functions may be selected in firmware
5. TEST must be connected to VSS for proper device operation
6. All pins with the same name must be shorted together for proper device operation
7. IF5.0 can be used as an analog external input to programmable gain amplifiers
Alternate 3
SQI_SIO[1]
SQI_SIO[0]
http://onsemi.com
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