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ADC0804 View Datasheet(PDF) - Intersil

Part NameDescriptionManufacturer
ADC0804 8-Bit, Microprocessor-Compatible, A/D Converters Intersil
Intersil Intersil
ADC0804 Datasheet PDF : 16 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
ADC0802, ADC0803, ADC0804
Electrical Specifications (Notes 1, 7) (Continued)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
CONVERTER SPECIFICATIONS V+ = 5V, -55oC to 125oC and fCLK = 640kHz, Unless Otherwise Specified
Total Unadjusted Error
ADC0802
VREF/2 = 2.500V
-
-
±1
ADC0803
VREF/2 Adjusted for Correct Full
-
Scale Reading
-
±1
VREF/2 Input Resistance
Input Resistance at Pin 9
1.0
1.3
Analog Input Voltage Range
(Note 2)
GND-0.05
-
DC Common-Mode Rejection
Over Analog Input Voltage Range
-
±1/8
Power Supply Sensitivity
V+ = 5V ±10% Over Allowed Input
-
±1/8
Voltage Range
AC TIMING SPECIFICATIONS V+ = 5V, and TA = 25oC, Unless Otherwise Specified
Clock Frequency, fCLK
V+ = 6V (Note 3)
100
640
V+ = 5V
100
640
-
(V+) + 0.05
±1/4
±1/4
1280
800
Clock Periods per Conversion
(Note 4), tCONV
62
-
73
Conversion Rate In Free-Running INTR tied to WR with CS = 0V,
-
Mode, CR
fCLK = 640kHz
-
8888
Width of WR Input (Start Pulse
Width), tW(WR)I
CS = 0V (Note 5)
100
-
-
Access Time (Delay from Falling CL = 100pF (Use Bus Driver IC for
-
Edge of RD to Output Data Valid), Larger CL)
tACC
135
200
Three-State Control (Delay from CL = 10pF, RL= 10K
-
Rising Edge of RD to Hl-Z State), (See Three-State Test Circuits)
t1H, t0H
125
250
Delay from Falling Edge of WR to
Reset of INTR, tWI, tRI
-
300
450
Input Capacitance of Logic
Control Inputs, CIN
-
5
-
Three-State Output Capacitance
(Data Buffers), COUT
-
5
-
DC DIGITAL LEVELS AND DC SPECIFICATIONS V+ = 5V, and TMIN to TMAX, Unless Otherwise Specified
CONTROL INPUTS (Note 6)
Logic “1“ Input Voltage (Except
Pin 4 CLK IN), VINH
Logic “0“ Input Voltage (Except
Pin 4 CLK IN), VINL
CLK IN (Pin 4) Positive Going
Threshold Voltage, V+CLK
CLK IN (Pin 4) Negative Going
Threshold Voltage, V-CLK
CLK IN (Pin 4) Hysteresis, VH
Logic “1” Input Current
(All Inputs), IINHI
Logic “0” Input Current
(All Inputs), IINLO
Supply Current (Includes Ladder
Current), I+
V+ = 5.25V
V+ = 4.75V
VlN = 5V
VlN = 0V
fCLK = 640kHz,TA = 25oC
and CS = Hl
2.0
-
V+
-
-
0.8
2.7
3.1
3.5
1.5
1.8
2.1
0.6
1.3
2.0
-
0.005
1
-1
-0.005
-
-
1.3
2.5
DATA OUTPUTS AND INTR
Logic “0” Output Voltage, VOL
lO = 1.6mA, V+ = 4.75V
-
-
0.4
UNITS
LSB
LSB
k
V
LSB
LSB
kHz
kHz
Clocks/Conv
Conv/s
ns
ns
ns
ns
pF
pF
V
V
V
V
V
µΑ
µA
mA
V
6-8
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