MC68HC05B32VB View Datasheet(PDF) - Motorola => Freescale

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Description

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MC68HC05B32VB

High-density Complementary Metal Oxide Semiconductor (HCMOS) Microcomputer Unit

Motorola => Freescale 

2.2

Serial RAM loader

2

The ‘load program in RAM and execute’ mode is entered if the following conditions are satisfied

when the reset pin is released to VDD. The format used is identical to the format used for the

MC68HC805C4. The SEC bit in the options register must be inactive, i.e. set to ‘1’.

– IRQ at 2xVDD

– TCAP1 at VDD

– PD3 at VDD for at least 30 machine cycles after reset

– PD4 at VSS for at least 30 machine cycles after reset

In the ‘load program in RAM and execute’ routine, user programs are loaded into MCU RAM via

the SCI port and then executed. Data is loaded sequentially, starting at RAM location $0050, until

the last byte is loaded. Program control is then transferred to the RAM program starting at location

$0051. The first byte loaded is the count of the total number of bytes in the program plus the count

byte. The program starts at the second byte in RAM. During the firmware initialization stage, the

SCI is configured for the NRZ data format (idle line, start bit, eight data bits and stop bit). The baud

rate is 9600 with a 4 MHz crystal. A program to convert ASCII S-records to the format required by

the RAM loader is available from Motorola.

If immediate execution is not desired after loading the RAM program, it is possible to hold off

execution. This is accomplished by setting the byte count to a value that is greater than the overall

length of the loaded data. When the last byte is loaded, the firmware will halt operation expecting

additional data to arrive. At this point, the reset switch is placed in the reset position which will

reset the MCU, but keep the RAM program intact. All routines can now be entered from this state,

including the one which will execute the program in RAM (see Section 2.3).

To load a program in the EEPROM, the ‘load program in RAM and execute’ function is also used.

In this instance the process involves two distinct steps. Firstly, the RAM is loaded with a program

which will control the loading of the EEPROM, and when the RAM contents are executed, the

MCU is instructed to load the EEPROM.

The erased state of the EEPROM is $FF.

Figure 2-2 shows the schematic diagram of the circuit required for the serial RAM loader.

2.3

‘Jump to any address’

The ‘jump to any address’ mode is entered when the reset pin is released to VDD, if the following

conditions are satisfied:

– IRQ at 2xVDD

– TCAP1 at VDD

– PD3 at VDD for at least 30 machine cycles after reset

– PD4 at VDD for at least 30 machine cycles after reset

MOTOROLA

2-4

MODES OF OPERATION AND PIN DESCRIPTIONS

MC68HC05B6

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