ST6285BQ6 View Datasheet(PDF) - STMicroelectronics

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Description

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ST6285BQ6

8-BIT OTP/EPROM MCU WITH LCD DRIVER, EEPROM AND A/D CONVERTER

STMicroelectronics 

ST62T85B/E85B

1.2 PIN DESCRIPTIONS

VDD and VSS. Power is supplied to the MCU via

these two pins. VDD is the power connection and

VSS is the ground connection.

OSCin and OSCout. These pins are internally

connected to the on-chip oscillator circuit. A quartz

crystal, a ceramic resonator or an external clock

signal can be connected between these two pins.

The OSCin pin is the input pin, the OSCout pin is

PB0...PB3. These 4 lines are organised as one I/O

port (B). Each line may be configured under soft-

ware control as inputs with or without internal pull-

up resistors, interrupt generating inputs with pull-

up resistors, open-drain or push-pull outputs, an-

alog inputs for the A/D converter. PB0 (resp. PB1)

can also be used as reception (resp. transmission)

line for the embedded UART.

the output pin.

PC4-PC7. These 4 lines are organised as one I/O

RESET. The active-low RESET pin is used to re-

start the microcontroller.

port (C). Each line may be configured under soft-

ware control as input with or without internal pull-

up resistor, interrupt generating input with pull-up

TEST/VPP. The TEST must be held at VSS for nor-

mal operation. If TEST pin is connected to a

resistor, open-drain or push-pull output, or analog

imputs for the A/D Converter.

+12.5V level during the reset phase, the

EPROM/OTP programming Mode is entered.

NMI. The NMI pin provides the capability for asyn-

) chronous interruption, by applying an external non

t(s maskable interrupt to the MCU. The NMI input is

falling edge sensitive with Schmitt trigger charac-

c teristics. The user can select as option the availa-

u bility of an on-chip pull-up at this pin.

rod PA4-PA7. These 4 lines are organised as one I/O

port (A). Each line may be configured under soft-

P ware control as inputs with or without internal pull-

te up resistors, interrupt generating inputs with pull-

le up resistors, open-drain or push-pull outputs.

PA5/SCL, PA6/Sin and PA7/Sout can be used re-

o spectively as data clock, data in and clock pins for

s the on-chip SPI, while PA4/TIMER can be used as

b Timer I/O. In addition, PA4-PA7 can sink 20mA for

Obsolete Product(s) - O direct LED or TRIAC drive.

COM1-COM8. These eight pins are the LCD pe-

ripheral common outputs. They are the outputs of

the on-chip backplane voltage generator which is

used for multiplexing the LCD lines.

COM9/S1-COM16/S8. These pins are the 8 multi-

plexed common/segment lines. Under software

selected control, they can act as LCD common

outputs allowing a 40 x 16 dot matrix operation, or

they can act as segment outputs alowwing 48 x 8

dot matrix operation.

S9-S24, S33..S56. These pins are the 40 LCD pe-

ripheral segment outputs.

VLCD1/5, VLCD5/5. Display supply voltage inputs

for determining the display voltage levels on

common and segment pins during multiplex oper-

ation.

8/78

8

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