ST62T85B/E85B
1 GENERAL DESCRIPTION
1.1 INTRODUCTION
The ST62T85B and ST62E85B devices are low
cost members of the ST62xx 8-bit HCMOS family
of microcontrollers, which is targeted at low to me-
dium complexity applications. All ST62xx devices
are based on a building block approach: a com-
Figure 1. Block Diagram
mon core is surrounded by a number of on-chip
peripherals.
The ST62E85B is the erasable EPROM version of
the ST62T85B device, which may be used to em-
ulate the ST62T85B device, as well as the respec-
tive ST6285B ROM devices.
PA4 / TIMER / 20mA Sink
8-BIT
PORT A
PA5 / Scl / 20mA Sink
TEST/VPP
lete Product(s) NMI
TEST
A/D CONVERTER
INTERRUPT
PROGRAM
Memory
7948 bytes
DATA ROM
USER
SELECTABLE
DATA RAM
192 Bytes
DATA EEPROM
128 Bytes
bso PC
- O STACK LEVEL 1
) STACK LEVEL 2
t(s STACK LEVEL 3
STACK LEVEL 4
c STACK LEVEL 5
du STACK LEVEL 6
8 BIT CORE
ro POWER OSCILLATOR RESET
P SUPPLY
leteVDDVSS OSCin OSCout RESET
Obso (VPP on EPROM/OTP versions only)
PORT B
ARTIMER
UART
PORT C
LCD DRIVER
PA6 / Sin / 20mA Sink
PA7 / Sout / 20mA Sink
PB0 / RXD / Ain
PB1 / TXD / Ain
PB2..PB3 / Ain
PC4..PC7 / Ain
COM1..COM8
S9..S24, S33..S56
COM9..COM16 / S1..S8
VLCD
VLCD1/5
VLCD2/5
VLCD3/5
VLCD4/5
TIMER
DIGITAL
WATCHDOG
SPI (SERIAL
PERIPHERAL
INTERFACE)
VA0479
5/78
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