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EF6805U3FND View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
EF6805U3FND 8-BIT MICROCOMPUTER UNIT ST-Microelectronics
STMicroelectronics ST-Microelectronics
EF6805U3FND Datasheet PDF : 31 Pages
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EF6805U3
Figure 6 : Interrupt Stacking Order.
CENTRAL PROCESSING UNIT
The CPU of the EF6805 Family is implemented in-
dependently from the I/O or memory configuration.
Figure 8 : Programming Model.
Consequently, it can be treated as an independent
central processor communicating with I/O and me-
mory via internal address, data, and control buses.
REGISTERS
The 6805 Family CPU has five registers available to
the programmer. They are shown in figure 8 and are
explained in the following paragraphs.
ACCUMULATOR (A) - The accumulator is a general
purpose 8-bit register used to hold operands and re-
sults of arithmetic calculations or data manupula-
tions.
INDEX REGISTER (X) - The index register is an 8-
bit register used for the indexed addressing mode.
It contains an 6-bit value that may be added to an
instruction value to create an effective address. The
index register can also be used for data manipula-
tions using the read-modify-write instructions. The
Index Register may also be used as a temporary
storage area.
PROGRAM COUNTER (PC) - The Program Coun-
ter is a 12 bit register that contains th address of the
next instruction to be executed.
STACK POINTER (SP) - The stack pointer is a 12-
bit register that contains the address of the next free
location on the stack. During an MCU reset or the
reset stack pointer (RSP) instruction, the stack poin-
ter is set to location $07F. The stack pointer is then
decremented as data is pushed onto the stack and
incremented as data is then pulled from the stack.
The seven most significant bits of the stack pointer
are permanently set to 0000011. Subroutines and
interrupts may be nested down to location $061 (31
bytes maximum) which allows the programmer to
use up to 15 levels of subroutine calls (less if inter-
rupts are allowed).
CONDITION CODE REGISTER (CC) - The condi-
tion code register is a 5-bit register in which foour bits
are used to indicate the results of the instruction just
executed. These bits can be individually tested by a
program and specific action taken as a result of their
state. Each bit is explained in the following para-
graphs.
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