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EF6805U3FND View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
EF6805U3FND 8-BIT MICROCOMPUTER UNIT ST-Microelectronics
STMicroelectronics ST-Microelectronics
EF6805U3FND Datasheet PDF : 31 Pages
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EF6805U3
A software interrupt (SWI) is an executable instruc-
tion which is executed regardless of the state of the
I bit in the condition code register. SWIs are usually
Figure 19 : Typical Interrupt Circuits.
used as break-points for debugging or a system
calls.
INPUT/OUTPUT CIRCUITRY
There are 32 input/output pins. The INT pin may be
polled with branch instructions to provide an additio-
nal input pin. All pins on ports A, B, and C are pro-
grammable as either inputs or outputs under soft-
ware control of the corresponding data direction re-
gister (DDR). See below I/O port control registers
configuration. The port I/O programming is ac-
complished by writing the corresponding bit in the
port DDR to a logic one for output or a logic zero for
input. On reset all the DDRs are initialized to a logic
zero state, placing the ports in the input mode. The
port output registers are not initialized on reset and
should be initialized by software before changing the
DDRs from input to output. A read operation on a
port programmed as an output will read the contents
of the output latch regardless of the logic levels at
the output pin, due to output loading. Refer to figure
20.
PORT DATA REGISTER
7
0
Port A Addr = $000
Port B Addr = $001
Port C Addr = $002
Port D Addr = $003
PORT DATA DIRECTION REGISTER (DDR)
7
0
(1) Write only ; reads as all “1s”
(2) 1 = Output. 0 = input Cleared to 0 by Reset
(3) Port A Addr = $004
Port B Addr = $005
Port C Addr = $006
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