PCF8582C2D View Datasheet(PDF) -
PCF8582C2D Datasheet PDF : 0 Pages
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Philips Semiconductors
PCF8582C-2
256 × 8-bit CMOS EEPROM with I2C-bus interface
PTC
td t r t HIGH t f t LOW
1
2
SDA
SCL
STOP
Fig 11. n bytes E/W cycle (n = 2 to 7).
n x 256 + 1
MBA698
PTC
SDA
SCL
Fig 12. Page mode.
td t r t HIGH t f t LOW
1
2
STOP
1153
MBA699
SLAVE ADDRESS WORD ADDRESS
I2C-bus S
0A
A
DATA
A
DATA
A P (1)
HIGH
PTC
LOW
undefined
negative edge
SCL 8-bit
12
12
12
td 0
257
513
1153
undefined
clock (2)
clock (3)
clock (4)
MBA700
(1) If an external clock is chosen, this information is latched internally by setting pin 7 (PTC) LOW after transmission of the
eighth bits of the word address (negative edge of SCL). Thus the state of pin 7 may be previously undefined. Leaving pin 7
LOW causes a higher standby current.
(2) 1-byte programming.
(3) 2-byte programming.
(4) One page (8 bytes) programming.
Fig 13. External clock.
9397 750 08536
Product data
Rev. 02 — 09 May 2002
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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