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DP83815 View Datasheet(PDF) - National ->Texas Instruments

Part NameDescriptionManufacturer
DP83815 10/100 Mb/s Integrated PCI Ethernet Media Access Controller and Physical Layer (MacPhyter™) National-Semiconductor
National ->Texas Instruments National-Semiconductor
DP83815 Datasheet PDF : 108 Pages
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4.0 Register Set (Continued)
Bit
24-22
21
20
19
18-16
15-8
7-0
Bit Name
Description
AUX_CURRENT Aux_Current
This 3 bit field reports the 3.3Vaux auxiliary current requirements for the PCI function.
If PMEN generation from D3cold is not supported by the function(PMCAP[31]), this field returns a
value of "000b" when read.
Bit
3.3Vaux
24 23 22 Max. Current Required
110
320 mA
000
0 (self powered)
DSI
Device Specific Initialization
This bit is set to 1 to indicate to the system that initialization of the DP83815 device is required
(beyond the standard PCI configuration header) before the generic class device driver is able to use
it. A 1 indicates that DP83815 requires a DSI sequence following transition to the D0 uninitialized
state. This bit can be loaded from the EEPROM.
Reserved
(reads return 0)
PMEC
PME Clock
Returns 0 to indicate PCI clock not needed for PMEN.
PMV
Power Management Version
This bit field indicates compliance to a specific PM specification rev level. Currently set to 010b.
NLIPTR
Next List Item Pointer
Offset into PCI configuration space for the location of the next item in the Capabilities Linked List.
Returns 00h as no other capabilities are offered.
CAPID
Capability ID
Always returns 01h for Power Management ID.
4.1.12 Power Management Control and Status Register
This register contains PM control and status information.
Tag: PMCSR
Size: 32 bits
Offset: 44h
Access: Read Write
Hard Reset: 00000000h
Soft Reset: unchanged
Bit
31-24
23-16
15
14-9
8
7-2
1-0
Bit Name
BSE
PMESTS
PMEEN
PSTATE
Description
Reserved
(reads return 0)
Bridge Support Extensions
unused (reads return 0)
PME Status
Sticky bit which represents the state of the PME logic, regardless of the state of the PMEEN bit.
Reserved
(reads return 0)
PME Enable
When set to 1, this bit enables the assertion of the PME function on the PMEN pin. When 0, the PMEN
pin is forced to be inactive. This value can be loaded from the EEPROM.
Unused
(reads return 0)
Power State
This 2 bit field is used to determine the current power state of DP83815, and to set a new power state.
00 - D0
10 - D2
01 - D1
11 - D3hot/cold
39
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