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M74HC148 View Datasheet(PDF) - STMicroelectronics

Part NameDescriptionManufacturer
M74HC148 8 TO 3 LINE PRIORITY ENCODER ST-Microelectronics
STMicroelectronics ST-Microelectronics
M74HC148 Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
M54HC148
M74HC148
8 TO 3 LINE PRIORITY ENCODER
. HIGH SPEED
tPD = 15 ns (TYP.) AT VCC = 5 V
. LOW POWER DISSIPATION
ICC = 4 µA (MAX.) AT TA = 25 °C
. HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.)
. OUTPUT DRIVE CAPABILITY
10 LSTTL LOADS
. SYMMETRICAL OUTPUT IMPEDANCE
IOH= IOL = 4 mA (MIN.)
. BALANCED PROPAGATION DELAYS
tPLH = tPHL
. WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V
. PIN AND FUNCTION COMPATIBLE
WITH 54/74LS148
DESCRIPTION
B1R
(Plastic Package)
F1R
(Ceramic Package)
M 1R
(Micro Package)
C1R
(Chip Carrier)
ORDER CODES :
M 54HC 14 8F 1R
M 74H C1 48 M1 R
M 74HC 14 8B 1R
M 74H C1 48 C1 R
The M54/74HC148 is a high speed CMOS 8-TO-3
LINE PRIORITY ENCODER fabricated in silicon
gate C2MOS technology.
PIN CONNECTIONS (top view)
It has the same high speed performance for LSTTL
combined with true CMOS low power consumption.
The M54/74HC148 encodes eight data lines to
three-line (4-2-1) binary (octal). Cascading circuitry
(enable input EI and enable output EO) has been
provided to allow octal expansion without the need
for external circuitry. Data inputs are active at the
low logic level.
All inputs are equipped with protection circuits
against static discharge and transient excess volt-
age.
INPUT AND OUTPUT EQUIVALENT CIRCUIT
October 1992
NC =
No Internal
Connection
1/11
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