P80C31 View Datasheet(PDF) - Philips Electronics

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P80C31

80C51 8-bit microcontroller family 4K/128 OTP/ROM/ROMless low voltage (2.7V–5.5V), low power, high speed (33 MHz)

Philips Electronics 

Philips Semiconductors

80C51 8-bit microcontroller family

4K/128 OTP/ROM/ROMless, low voltage (2.7V–5.5V),

low power, high speed (33 MHz)

Product specification

80C51/87C51/80C31

Reduced EMI Mode

The AO bit (AUXR.0) in the AUXR register when set disables the

ALE output.

Reduced EMI Mode

AUXR (8EH)

7

6

5

4

3

2

1

0

–

–

–

–

–

–

–

AO

AUXR.0

AO

Turns off ALE output.

Dual DPTR

The dual DPTR structure (see Figure 13) enables a way to specify

the address of an external data memory location. There are two

16-bit DPTR registers that address the external memory, and a

single bit called DPS = AUXR1/bit0 that allows the program code to

switch between them.

• New Register Name: AUXR1#

• SFR Address: A2H

• Reset Value: xxx000x0B

AUXR1 (A2H)

7

6

5

4

3

2

1

0

–

–

–

LPEP WUPD

0

–

DPS

Where:

DPS = AUXR1/bit0 = Switches between DPTR0 and DPTR1.

Select Reg

DPTR0

DPTR1

DPS

0

1

The DPS bit status should be saved by software when switching

between DPTR0 and DPTR1.

Note that bit 2 is not writable and is always read as a zero. This

allows the DPS bit to be quickly toggled simply by executing an INC

DPTR insstruction without affecting the WOPD or LPEP bits.

DPS

BIT0

AUXR1

DPH

(83H)

DPL

(82H)

DPTR1

DPTR0

Figure 13.

EXTERNAL

DATA

MEMORY

SU00745A

DPTR Instructions

The instructions that refer to DPTR refer to the data pointer that is

currently selected using the AUXR1/bit 0 register. The six

instructions that use the DPTR are as follows:

INC DPTR

MOV DPTR, #data16

MOV A, @ A+DPTR

MOVX A, @ DPTR

MOVX @ DPTR , A

JMP @ A + DPTR

Increments the data pointer by 1

Loads the DPTR with a 16-bit constant

Move code byte relative to DPTR to ACC

Move external RAM (16-bit address) to

ACC

Move ACC to external RAM (16-bit

address)

Jump indirect relative to DPTR

The data pointer can be accessed on a byte-by-byte basis by

specifying the low or high byte in an instruction which accesses the

SFRs. See application note AN458 for more details.

2000 Jan 20

19

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