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I2040C-08TR View Datasheet(PDF) - Alliance Semiconductor

Part Name
Description
View to exact match
I2040C-08TR
ALSC
Alliance Semiconductor ALSC
I2040C-08TR Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
September 2005
rev 1.4
Pin Configuration
CLKIN 1
MRA 2
SR1 3
VSS 4
8 VDD
P2040C
7 SR0
6 ModOUT
5 SSON#
P2040C
Pin Description
Pin#
1
2
3
4
5
6
7
8
Pin
Name
CLKIN
MRA
SR1
VSS
SSON#
ModOUT
SR0
VDD
Type
Description
I External reference frequency input. Connect to externally generated reference signal.
I Digital logic input used to select modulation rate. This pin has an internal pull-up resistor.
I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
P Ground to entire chip. Connect to system ground.
I
Digital logic input used to enable Spread Spectrum function (Active LOW). Spread Spectrum
function enabled when LOW, disabled when HIGH. This pin has an internal pull-low resistor.
O Spread spectrum Clock Output.
I Digital logic input used to select Spreading Range. This pin has an internal pull-up resistor.
P Power supply for the entire chip.
Modulation Selection (Commercial) – Table 1
MRA SR1 SR0
0
0
0
0
0
1
0
1
0
0
1
1
1
0
0
1
0
1
1
1
0
1
1
1
54MHz
±1.4%
±2.0%
±1.1%
±1.8%
±1.3%
±2.2%
±1.4%
±2.1%
Spreading Range
65MHz 81MHz 140MHz
±1.2%
±1.0%
±0.6%
±1.9%
±1.6%
±1.0%
±0.9%
±0.5%
±0.3%
±1.5%
±1.0%
±0.54%
±1.3%
±1.3%
±1.25%
±2.1%
±2.1%
±2.0%
±1.3%
±1.4%
±1.2%
±2.1%
±2.1%
±1.9%
162MHz
±0.4%
±0.8%
±0.3%
±0.4%
±1.1%
±1.8%
±0.9%
±1.4%
Modulation Rate
(Fin/80) * 62.49KHz
(Fin/80) * 62.49KHz
(Fin/80) * 62.49KHz
(Fin/80) * 62.49KHz
(Fin/80) * 20.83KHz
(Fin/80) * 20.83KHz
(Fin/80) * 20.83KHz
(Fin/80) * 20.83KHz
LCD Panel EMI Reduction IC
Notice: The information in this document is subject to change without notice.
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