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OP493FP_02 View Datasheet(PDF) - Analog Devices

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Description
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OP493FP_02 Datasheet PDF : 16 Pages
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60
TA ؍25°C
VS ؍±15V
40
20
0
20
10
100
1k
10k
100k
FREQUENCY Hz
TPC 19. Closed-Loop Gain vs.
Frequency, VS = ±15 V
60
VS ؍5V TA ؍25°C
AV ؍1
+OS | ؍OS |
50 50mV Յ VIN Յ 150mV RL ؍50k
LOADS TO GND
40
30
+OS
RL ؕ ؍
20
10
+OS | ؍OS |
O
RL
S؍
ؕ
RL ؍10k
0
10
100
1000
10000
CAPACITIVE LOAD pF
TPC 20. Small Signal Overshoot
vs. Capacitive Load
OP193/OP293/OP493
60
VS ؍5V
PHASE
40
90
20
45
GAIN
0
0
20
45
40
90
100
1k
10k
100k
1M
FREQUENCY Hz
TPC 21. Open-Loop, Gain and
Phase vs. Frequency
60
VS ؍±15V
40
PHASE
90
20
45
GAIN
0
0
20
45
40
90
100
1k
10k
100k
1M
FREQUENCY Hz
TPC 22. Open-Loop, Gain and
Phase vs. Frequency
FUNCTIONAL DESCRIPTION
The OP193 family of operational amplifiers are single-supply,
micropower, precision amplifiers whose input and output ranges
both include ground. Input offset voltage (VOS) is only 75 µV
maximum, while the output will deliver ± 5 mA to a load. Sup-
ply current is only 17 µA.
A simplified schematic of the input stage is shown in Figure 1.
Input transistors Q1 and Q2 are PNP devices, which permit the
inputs to operate down to ground potential. The input transis-
tors have resistors in series with the base terminals to protect the
junctions from over voltage conditions. The second stage is an
NPN cascode which is buffered by an emitter follower before
driving the final PNP gain stage.
The OP193 includes connections to taps on the input load
resistors, which can be used to null the input offset voltage, VOS.
The OP293 and OP493 have two additional transistors, Q7 and
Q8. The behavior of these transistors is discussed in the Output
Phase Reversal section of this data sheet.
The output stage, shown in Figure 2, is a noninverting NPN
“totem-pole” configuration. Current is sourced to the load by
emitter follower Q1, while Q2 provides current sink capability.
When Q2 saturates, the output is pulled to within 5 mV of
ground without an external pull-down resistor. The totem-pole
output stage will supply a minimum of 5 mA to an external
load, even when operating from a single 3.0 V power supply.
+INPUT 2k
2k
INPUT
I1
Q1 Q2
V+
I2
I3 I4
Q5
Q6
OP293,
OP493
ONLY
Q7
Q4
Q3
Q8
TO
OUTPUT
D1
STAGE
R1A
R2A
R1B
R2B
I5 I6
V
NULLING
TERMINALS
(OP193 ONLY)
Figure 1. OP193/OP293/OP493 Equivalent Input Circuit
V+
FROM
INPUT
STAGE
Q4
Q1
Q5
Q3
OUTPUT
Q2
I3
I2
I1
V
Figure 2. OP193/OP293/OP493 Equivalent Output Circuit
By operating as an emitter follower, Q1 offers a high impedance
load to the final PNP collector of the input stage. Base drive to
Q2 is derived by monitoring Q1’s collector current. Transistor
Q5 tracks the collector current of Q1. When Q1 is on, Q5 keeps
Q4 off, and current source I1 keeps Q2 turned off. When Q1 is
driven to cutoff (i.e., the output must move toward V–), Q5
allows Q4 to turn on. Q4’s collector current then provides the
base drive for Q3 and Q2, and the output low voltage swing is
set by Q2’s VCE,SAT which is about 5 mV.
REV. B
–9–
 

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