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NM25C040 View Datasheet(PDF) - Fairchild Semiconductor

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Description
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NM25C040 Datasheet PDF : 10 Pages
1 2 3 4 5 6 7 8 9 10
Standard Voltage 4.5 VCC 5.5V Specifications
Absolute Maximum Ratings (Note 1)
Operating Conditions
Ambient Storage Temperature
All Input or Output Voltage with
Respect to Ground
Lead Temp. (Soldering, 10 sec.)
ESD Rating
-65°C to +150°C
+6.5V to -0.3V
+300°C
2000V
Ambient Operating Temperature
NM25C040
NM25C040E
NM25C040V
Power Supply (VCC)
0°C to +70°C
-40°C to +85°C
-40°C to +125°C
4.5V to 5.5V
DC and AC Electrical Characteristics 4.5V VCC 5.5V (unless otherwise specified)
Symbol
Parameter
Conditions
Min
Max Units
ICC
ICCSB
IIL
IOL
VIL
VIH
VOL
VOH
fOP
tRI
tFI
tCLH
tCLL
tCSH
tCSS
tDIS
tHDS
tCSN
tDIN
tHDN
tPD
tDH
tLZ
tDF
tHZ
tWP
Operating Current
Standby Current
Input Leakage
Output Leakage
CMOS Input Low Voltage
CMOS Input High Voltage
Output Low Voltage
Output High Voltage
SCK Frequency
Input Rise Time
Input Fall Time
Clock High Time
Clock Low Time
Min CS High Time
CS Setup Time
Data Setup Time
HOLD Setup Time
CS Hold Time
Data Hold Time
HOLD Hold Time
Output Delay
Output Hold Time
HOLD to Output Low Z
Output Disable Time
HOLD to Output High Z
Write Cycle Time
CS = VIL
CS = VCC
VIN = 0 to VCC
VOUT = GND to VCC
IOL = 1.6 mA
IOH = -0.8 mA
(Note 2)
(Note 2)
(Note 3)
CL = 200 pF
CL = 200 pF
1–4 Bytes
-1
-1
-0.3
0.7 * VCC
VCC - 0.8
190
190
240
240
100
90
240
100
90
0
3
50
+1
+1
VCC * 0.3
VCC + 0.3
0.4
2.1
2.0
2.0
240
100
240
100
10
mA
µA
µA
µA
V
V
V
V
MHz
µs
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ms
Capacitance TA = 25°C, f = 2.1/1 MHz (Note 4)
Symbol
Test
Typ Max Units
COUT
CIN
Output Capacitance
3
8 pF
Input Capacitance
2
6 pF
AC Test Conditions
Output Load
Input Pulse Levels
Timing Measurement Reference Level
CL = 200 pF
0.1 * VCC – 0.9 * VCC
0.3 * VCC - .07 * VCC
Note 1: Stress above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only, and functional operation of the
device at these or any other conditions above those indicated in the operational sections of the specification is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect device reliability.
Note 2: The fOP frequency specification specifies a minimum clock period of 1/fOP. Therefore, for every fOP clock cycle, tCLH + tCLL must be equal to or greater than 1/fOP. For
example, if the 2.1MHz period = 476ns and tCLH = 190ns, tCLL must be 286ns.
Note 3: CS must be brought high for a minimum of tCSH between consecutive instruction cycles.
Note 4: This parameter is periodically sampled and not 100% tested.
NM25C040 Rev. D.1
3
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