NE5020N View Datasheet(PDF) - Philips Electronics
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NE5020N Datasheet PDF : 10 Pages
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Philips Semiconductors Linear Products
10-Bit µP-compatible D/A converter
Product specification
NE5020
R1 = 20K, 10T POTENTIOMETER
VCC
–VCC
R2 = 1MΩ
DAC
CURRENT OUTPUT
–
+
5k
SUM (22)
NODE
(OPTIONAL)
5k
VOUT
AMP
COMP
(23)
(20) CFF
(24)
CC
Figure 14. Zero-Scale Adjustment
VREF OUT
VREF OUT
(15)
15k
R3 = 10k
10T POT
R3 = 80k
VREF ADJ
(14)
5k
+
INT
REF
–
Figure 15. Reference Adjust Circuit
Bipolar Output Voltage
The NE5020 includes a thermally matched resistor, RBIP, to offset
the output voltage by 5V to obtain –5V to +5V output voltage range
potentiometer R1 until VOUT equals 0.000V in the unipolar mode or
–5.000V in the bipolar mode (see bipolar section accomplishes this
trim.
operation. This is accomplished by shorting Pins 18 and 22 (see
Figure 13). This connection produces a current equal to (VREFIN –
SUM NODE) ÷ RBIP (1mA nominal), which is injected into the sum
node. Since full-scale current out is approximately 2mA
(1.9980mA), (2mA – 1mA)5kΩ = 5V will appear at the output. For
zero DAC output currents, 1mA is still injected into sum node and
VOUT = –(5kΩ) (1mA) = –5V. Zero-scale adjust and full-scale adjust
are performed as described below, noting that full-scale voltage is
now approximately +5V. Zero-scale adjust may be used to trim
VOUT = 0.00 with the MSB high or VOUT = –5.0V with all bits off.
Zero-Scale Adjustment
The method of trimming the small offset error that may exist when all
data bits are low is
shown in Figure 14. The trim is the result of injecting a current from
resistor R2 that counteracts the error current. Adjusting
Full-Scale Adjustment
A recommended full-scale adjustment circuit, when using the
internal voltage reference, is shown in Figure 15. Potentiometer R3
is adjusted until VOUT equals 9.99023V. In many applications where
the absolute accuracy of full-scale is of low importance when
compared to the other system accuracy factors this adjustment
circuit is optional.
As resistors RREF, RFB, and RBIP shown in the Block Diagram are
integrated in close proximity, they match and track in value closely
over wide ambient temperature variations. Typical matching is less
than ±0.3% which implies that typical full-scale (or gain) error is less
than ±0.3% of ideal full-scale value.
August 31, 1994
766
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