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NBSG16MMN View Datasheet(PDF) - ON Semiconductor

Part NameDescriptionManufacturer
NBSG16MMN 2.5 V/3.3 VMultilevel Input to CML Clock/Data Receiver/Driver/Translator Buffer ON-Semiconductor
ON Semiconductor ON-Semiconductor
NBSG16MMN Datasheet PDF : 11 Pages
1 2 3 4 5 6 7 8 9 10
NBSG16M
Application Information
All inputs can accept PECL, CML, and LVDS signal
levels. The input voltage can range from VCC to 1.2 V.
VCC
Examples interfaces are illustrated below in a 50 W
environment (Z = 50 W).
VCC
50 W 50 W
Q
SG16M
Z
D
VCC
VTD
Z
Q
D
VCC
VTD
VEE
Figure 5. CML to CML Interface
50 W
SG16M
50 W
VEE
VCC
VCC
Recommended RT Values
VCC RT
5.0 V 290 W
3.3 V 150 W
2.5 V 80 W
PECL
Driver
50 W
Z
50 W
Z
RT RT
VBias
D
VTD
VBias
D
VTD
VEE
VEE
Figure 7. PECL to CML Receiver Interface
50 W
SG16M
50 W
VEE
VCC
VCC
LVDS
Driver
Z
D
VTD
50 W
SG16M
Z
D
50 W
VTD
VEE
VEE
Figure 6. LVDS to CML Receiver Interface
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